unittester: Add dummy main ports

Reads and writes mostly do nothing but log, although the status returns a dummy value of 0x04 (no command in flight, not waiting for anything, and no errors).
This commit is contained in:
GreaseMonkey 2024-01-07 13:31:45 +13:00
parent 130d4094e1
commit 5279cd5d8d

View file

@ -79,9 +79,46 @@ unittester_log(const char *fmt, ...)
# define unittester_log(fmt, ...)
#endif
static void
unittester_write(uint16_t port, uint8_t val, UNUSED(void *priv))
{
if (port == unittester.iobase_port+0x00) {
/* Command port */
/* TODO! --GM */
unittester_log("[UT] W %02X Command\n", val);
} else if (port == unittester.iobase_port+0x01) {
/* Data port */
/* TODO! --GM */
unittester_log("[UT] W %02X Data\n", val);
} else {
/* Not handled here - possibly open bus! */
}
}
static uint8_t
unittester_read(uint16_t port, UNUSED(void *priv))
{
if (port == unittester.iobase_port+0x00) {
/* Status port */
/* TODO! --GM */
unittester_log("[UT] R -- Status\n");
return 0x04;
} else if (port == unittester.iobase_port+0x01) {
/* Data port */
/* TODO! --GM */
unittester_log("[UT] R -- Data\n");
return 0xFE;
} else {
/* Not handled here - possibly open bus! */
return 0xFF;
}
}
static void
unittester_trigger_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv))
{
unittester_log("[UT] Trigger value %02X -> FSM1 = %02X, FSM2 = %02X, IOBASE = %04X\n", val, unittester.fsm1, unittester.fsm2, unittester.iobase_port);
/* Update FSM2 */
switch (unittester.fsm2) {
/* IDLE: Do nothing - FSM1 will put us in the right state. */
@ -98,7 +135,20 @@ unittester_trigger_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv))
/* WAIT IOBASE 0: Set high byte of temporary IOBASE and commit to the real IOBASE. */
case UT_FSM2_WAIT_IOBASE_1:
unittester.fsm2_new_iobase |= ((uint16_t)val)<<8;
unittester_log("[UT] Remapping IOBASE: %04X -> %04X\n", val, unittester.iobase_port, unittester.fsm2_new_iobase);
/* Unmap old IOBASE */
if (unittester.iobase_port != 0xFFFF)
io_removehandler(unittester.iobase_port, 2, unittester_read, NULL, NULL, unittester_write, NULL, NULL, NULL);
unittester.iobase_port = 0xFFFF;
/* Map new IOBASE */
unittester.iobase_port = unittester.fsm2_new_iobase;
if (unittester.iobase_port != 0xFFFF)
io_sethandler(unittester.iobase_port, 2, unittester_read, NULL, NULL, unittester_write, NULL, NULL, NULL);
/* Reset FSM2 to IDLE */
unittester.fsm2 = UT_FSM2_IDLE;
break;
}
@ -128,6 +178,7 @@ unittester_trigger_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv))
break;
case 'x':
if (unittester.fsm1 == UT_FSM1_WAIT_x) {
unittester_log("[UT] Config activated, awaiting new IOBASE\n");
unittester.fsm2 = UT_FSM2_WAIT_IOBASE_0;
}
unittester.fsm1 = UT_FSM1_WAIT_8;
@ -137,8 +188,6 @@ unittester_trigger_write(UNUSED(uint16_t port), uint8_t val, UNUSED(void *priv))
unittester.fsm1 = UT_FSM1_WAIT_8;
break;
}
unittester_log("[UT] Trigger value %02X -> FSM1 = %02X, FSM2 = %02X, IOBASE = %04X\n", val, unittester.fsm1, unittester.fsm2, unittester.iobase_port);
}
static void *
@ -157,6 +206,10 @@ unittester_close(UNUSED(void *priv))
{
io_removehandler(unittester.trigger_port, 1, NULL, NULL, NULL, unittester_trigger_write, NULL, NULL, NULL);
if (unittester.iobase_port != 0xFFFF)
io_removehandler(unittester.iobase_port, 2, unittester_read, NULL, NULL, unittester_write, NULL, NULL, NULL);
unittester.iobase_port = 0xFFFF;
unittester_log("[UT] 86Box Unit Tester closed\n");
}