Commit graph

12 commits

Author SHA1 Message Date
Andreas Kling
2cd8b21974 Kernel: Add convenience values to the Memory::Region::Access enum
Instead of `Memory::Region::Access::Read | Memory::Region::AccessWrite`
you can now say `Memory::Region::Access::ReadWrite`.
2021-08-06 22:25:00 +02:00
Andreas Kling
93d98d4976 Kernel: Move Kernel/Memory/ code into Kernel::Memory namespace 2021-08-06 14:05:58 +02:00
Gunnar Beutner
a0c1af4327 Kernel: Specify I/O size for BMIDEChannel 2021-06-28 15:55:00 +02:00
Hendiadyoin1
62f9377656 Kernel: Move special sections into Sections.h
This also removes a lot of CPU.h includes infavor for Sections.h
2021-06-24 00:38:23 +02:00
Liav A
b91df26d4a Kernel/Interrupts: Return boolean on whether we handled the interrupt
If we are in a shared interrupt handler, the called handlers might
indicate it was not their interrupt, so we should not increment the
call counter of these handlers.
2021-06-17 16:53:25 +02:00
Andreas Kling
b91c49364d AK: Rename adopt() to adopt_ref()
This makes it more symmetrical with adopt_own() (which is used to
create a NonnullOwnPtr from the result of a naked new.)
2021-04-23 16:46:57 +02:00
Brian Gianforcaro
1682f0b760 Everything: Move to SPDX license identifiers in all files.
SPDX License Identifiers are a more compact / standardized
way of representing file license information.

See: https://spdx.dev/resources/use/#identifiers

This was done with the `ambr` search and replace tool.

 ambr --no-parent-ignore --key-from-file --rep-from-file key.txt rep.txt *
2021-04-22 11:22:27 +02:00
Liav A
2718d7c74c Kernel/Storage: Add support for IDE controllers in PCI native mode
Also handle native and compatibility channel modes together, so if only
one IDE channel was set to work on PCI native mode, we need to handle it
separately, so the other channel continue to operate with the legacy IO
ports and interrupt line.
2021-04-03 11:57:23 +02:00
Liav A
3547d90a0f Kernel/Storage: Select the drive before working with busmaster register
This is a "quirk" I've observed on a Intel ICH7 test machine. Apparently
we need to select the device (master or slave) before starting to work
with the bus master register.
It's very possible that other machines are requiring this step to happen
before the DMA transfer can occur correctly.

Also, when reading with DMA, we should set the transfer direction before
clearing the interrupt status.

For the sake of completeness, I added a few lines in places that I
deemed it to be reasonable to clear the interrupt status there.
2021-03-27 16:40:16 +01:00
Liav A
b96e4c1308 Kernel/Storage: Use more locking in the IDE code
This change should make it less possible for race conditions to happen
and cause fatal errors when accessing the hardware.
2021-03-27 16:40:16 +01:00
Liav A
8b446fb579 Kernel/Storage: Add support for non-bus mastering IDE controllers
Although unlikely to happen, a user can have an IDE controller that
doesn't support bus master capability. If that's the case, we need to
check for this, and create an IDEChannel (not BMIDEChannel) to allow
IO operations with the controller.
2021-03-27 16:40:16 +01:00
Liav A
833a6bd047 Kernel/Storage: Move IDE bus master handling code into a separate class
If the user requests to force PIO mode, we just create IDEChannel
objects which are capable of sending PIO commands only.
However, if the user doesn't force PIO mode, we create BMIDEChannel
objects, which are sending DMA commands.

This change is somewhat simplifying the code, so each class is
supporting its type of operation - PIO or DMA. The PATADiskDevice
should not care if DMA is enabled or not.

Later on, we could write an IDEChannel class for UDMA modes,
that are available and documented on Intel specifications for their IDE
controllers.
2021-03-27 16:40:16 +01:00