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964f8fbf3a
This adds some new buffers to the `FPUState` struct, which contains enough space for the `xsave` instruction to run. This instruction writes the upper part of the x86 SIMD registers (YMM0-15) to a seperate 256-byte area, as well as an "xsave header" describing the region. If the underlying processor supports AVX, the `fxsave` instruction is no longer used, as `xsave` itself implictly saves all of the SSE and x87 registers. Co-authored-by: Leon Albrecht <leon.a@serenityos.org>
75 lines
1.5 KiB
C++
75 lines
1.5 KiB
C++
/*
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* Copyright (c) 2022, Leon Albrecht <leon.a@serenityos.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/EnumBits.h>
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#include <AK/FPControl.h>
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#include <AK/Platform.h>
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#include <AK/Types.h>
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namespace Kernel::SIMD {
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// Intel-Manual Vol 1 Chp 13.4
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enum StateComponent : u64 {
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X87 = 1ull << 0ull,
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SSE = 1ull << 1ull, // xmm0-xmm7(15)
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AVX = 1ull << 2ull, // ymm0-ymm7(15) hi
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MPX_BNDREGS = 1ull << 3ull,
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MPX_BNDCSR = 1ull << 4ull,
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AVX512_opmask = 1ull << 5ull, // k0 - k9
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AVX512_ZMM_hi = 1ull << 6ull, // 0 - 15
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AVX512_ZMM = 1ull << 7ull, // 16 - 31 full
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PT = 1ull << 8ull,
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PKRU = 1ull << 9ull,
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CET_U = 1ull << 11ull,
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CET_S = 1ull << 12ull,
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HDC = 1ull << 13ull,
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LBR = 1ull << 15ull,
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HWP = 1ull << 16ull,
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XCOMP_ENABLE = 1ull << 63ull
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};
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AK_ENUM_BITWISE_OPERATORS(StateComponent);
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struct [[gnu::packed]] LegacyRegion {
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AK::X87ControlWord FCW;
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u16 FSW;
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u8 FTW;
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u8 : 8;
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u16 FOP;
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#if ARCH(I386)
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// 32-bit version
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u32 FIP_32;
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u16 FCS;
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u16 : 16;
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u32 FPD_32;
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u16 FDS;
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u16 : 16;
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#elif ARCH(X86_64)
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// 64-bit version
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u64 FIP_64;
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u64 FDP_64;
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#endif
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AK::MXCSR MXCSR;
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u32 MXCSR_mask;
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u8 st_mmx[128];
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u8 xmm[256];
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u8 available[96]; // Extra available space
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};
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static_assert(sizeof(LegacyRegion) == 512);
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struct [[gnu::packed]] Header {
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StateComponent xstate_bv;
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StateComponent xcomp_bv;
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u8 reserved[48];
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};
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static_assert(sizeof(Header) == 64);
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}
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