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741c871bc1
There's basically no real difference in software between a SATA harddisk and IDE harddisk. The difference in the implementation is for the host bus adapter protocol and registers layout. Therefore, there's no point in putting a distinction in software to these devices. This change also greatly simplifies and removes stale APIs and removes unnecessary parameters in constructor calls, which tighten things further everywhere.
72 lines
2.3 KiB
C++
72 lines
2.3 KiB
C++
/*
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* Copyright (c) 2021, Liav A. <liavalb@hotmail.co.il>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/RefPtr.h>
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#include <Kernel/Arch/x86/IO.h>
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#include <Kernel/Devices/Device.h>
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#include <Kernel/Interrupts/IRQHandler.h>
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#include <Kernel/Locking/Mutex.h>
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#include <Kernel/Memory/PhysicalPage.h>
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#include <Kernel/PhysicalAddress.h>
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#include <Kernel/Random.h>
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#include <Kernel/Sections.h>
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#include <Kernel/Storage/AHCIController.h>
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#include <Kernel/Storage/AHCIPort.h>
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#include <Kernel/Storage/StorageDevice.h>
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#include <Kernel/WaitQueue.h>
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namespace Kernel {
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class AsyncBlockDeviceRequest;
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class AHCIController;
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class AHCIPort;
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class AHCIPortHandler final : public RefCounted<AHCIPortHandler>
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, public IRQHandler {
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friend class AHCIController;
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public:
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UNMAP_AFTER_INIT static NonnullRefPtr<AHCIPortHandler> create(AHCIController&, u8 irq, AHCI::MaskedBitField taken_ports);
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virtual ~AHCIPortHandler() override;
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RefPtr<StorageDevice> device_at_port(size_t port_index) const;
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virtual StringView purpose() const override { return "SATA Port Handler"sv; }
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AHCI::HBADefinedCapabilities hba_capabilities() const;
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NonnullRefPtr<AHCIController> hba_controller() const { return m_parent_controller; }
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PhysicalAddress get_identify_metadata_physical_region(u32 port_index) const;
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bool is_responsible_for_port_index(u32 port_index) const { return m_taken_ports.is_set_at(port_index); }
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private:
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UNMAP_AFTER_INIT AHCIPortHandler(AHCIController&, u8 irq, AHCI::MaskedBitField taken_ports);
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//^ IRQHandler
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virtual bool handle_irq(const RegisterState&) override;
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enum class Direction : u8 {
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Read,
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Write,
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};
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AHCI::MaskedBitField create_pending_ports_interrupts_bitfield() const;
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void start_request(AsyncBlockDeviceRequest&, bool, bool, u16);
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void complete_current_request(AsyncDeviceRequest::RequestResult);
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void enumerate_ports(Function<void(const AHCIPort&)> callback) const;
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RefPtr<AHCIPort> port_at_index(u32 port_index) const;
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// Data members
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HashMap<u32, NonnullRefPtr<AHCIPort>> m_handled_ports;
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NonnullRefPtr<AHCIController> m_parent_controller;
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NonnullRefPtrVector<Memory::PhysicalPage> m_identify_metadata_pages;
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AHCI::MaskedBitField m_taken_ports;
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AHCI::MaskedBitField m_pending_ports_interrupts;
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};
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}
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