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[AVR32] Clean up asm/sysreg.h
Fix indentation and remove spurious comments in asm-avr32/sysreg.h Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
This commit is contained in:
Haavard Skinnemoen
parent
188ff65d49
commit
535c806c26
1 changed files with 249 additions and 294 deletions
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@ -7,8 +7,8 @@
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* it under the terms of the GNU General Public License version 2 as
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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* published by the Free Software Foundation.
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*/
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*/
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#ifndef __ASM_AVR32_SYSREG_H__
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#ifndef __ASM_AVR32_SYSREG_H
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#define __ASM_AVR32_SYSREG_H__
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#define __ASM_AVR32_SYSREG_H
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/* sysreg register offsets */
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/* sysreg register offsets */
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#define SYSREG_SR 0x0000
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#define SYSREG_SR 0x0000
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@ -60,6 +60,9 @@
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#define SYSREG_PCNT1 0x0134
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#define SYSREG_PCNT1 0x0134
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#define SYSREG_PCCR 0x0138
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#define SYSREG_PCCR 0x0138
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#define SYSREG_BEAR 0x013c
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#define SYSREG_BEAR 0x013c
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#define SYSREG_SABAL 0x0300
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#define SYSREG_SABAH 0x0304
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#define SYSREG_SABD 0x0308
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/* Bitfields in SR */
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/* Bitfields in SR */
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#define SYSREG_SR_C_OFFSET 0
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#define SYSREG_SR_C_OFFSET 0
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@ -72,6 +75,12 @@
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#define SYSREG_SR_V_SIZE 1
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#define SYSREG_SR_V_SIZE 1
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#define SYSREG_Q_OFFSET 4
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#define SYSREG_Q_OFFSET 4
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#define SYSREG_Q_SIZE 1
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#define SYSREG_Q_SIZE 1
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#define SYSREG_L_OFFSET 5
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#define SYSREG_L_SIZE 1
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#define SYSREG_T_OFFSET 14
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#define SYSREG_T_SIZE 1
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#define SYSREG_SR_R_OFFSET 15
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#define SYSREG_SR_R_SIZE 1
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#define SYSREG_GM_OFFSET 16
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#define SYSREG_GM_OFFSET 16
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#define SYSREG_GM_SIZE 1
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#define SYSREG_GM_SIZE 1
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#define SYSREG_I0M_OFFSET 17
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#define SYSREG_I0M_OFFSET 17
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@ -96,15 +105,9 @@
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#define SYSREG_DM_SIZE 1
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#define SYSREG_DM_SIZE 1
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#define SYSREG_SR_J_OFFSET 28
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#define SYSREG_SR_J_OFFSET 28
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#define SYSREG_SR_J_SIZE 1
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#define SYSREG_SR_J_SIZE 1
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#define SYSREG_R_OFFSET 29
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#define SYSREG_H_OFFSET 29
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#define SYSREG_R_SIZE 1
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#define SYSREG_H_OFFSET 30
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#define SYSREG_H_SIZE 1
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#define SYSREG_H_SIZE 1
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/* Bitfields in EVBA */
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/* Bitfields in ACBA */
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/* Bitfields in CPUCR */
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/* Bitfields in CPUCR */
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#define SYSREG_BI_OFFSET 0
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#define SYSREG_BI_OFFSET 0
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#define SYSREG_BI_SIZE 1
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#define SYSREG_BI_SIZE 1
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@ -119,79 +122,21 @@
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#define SYSREG_IEE_OFFSET 5
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#define SYSREG_IEE_OFFSET 5
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#define SYSREG_IEE_SIZE 1
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#define SYSREG_IEE_SIZE 1
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/* Bitfields in ECR */
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#define SYSREG_ECR_OFFSET 0
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#define SYSREG_ECR_SIZE 32
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/* Bitfields in RSR_SUP */
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/* Bitfields in RSR_INT0 */
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/* Bitfields in RSR_INT1 */
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/* Bitfields in RSR_INT2 */
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/* Bitfields in RSR_INT3 */
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/* Bitfields in RSR_EX */
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/* Bitfields in RSR_NMI */
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/* Bitfields in RSR_DBG */
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/* Bitfields in RAR_SUP */
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/* Bitfields in RAR_INT0 */
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/* Bitfields in RAR_INT1 */
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/* Bitfields in RAR_INT2 */
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/* Bitfields in RAR_INT3 */
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/* Bitfields in RAR_EX */
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/* Bitfields in RAR_NMI */
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/* Bitfields in RAR_DBG */
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/* Bitfields in JECR */
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/* Bitfields in JOSP */
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/* Bitfields in JAVA_LV0 */
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/* Bitfields in JAVA_LV1 */
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/* Bitfields in JAVA_LV2 */
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/* Bitfields in JAVA_LV3 */
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/* Bitfields in JAVA_LV4 */
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/* Bitfields in JAVA_LV5 */
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/* Bitfields in JAVA_LV6 */
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/* Bitfields in JAVA_LV7 */
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/* Bitfields in JTBA */
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/* Bitfields in JBCR */
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/* Bitfields in CONFIG0 */
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/* Bitfields in CONFIG0 */
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#define SYSREG_CONFIG0_R_OFFSET 0
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#define SYSREG_CONFIG0_R_SIZE 1
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#define SYSREG_CONFIG0_D_OFFSET 1
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#define SYSREG_CONFIG0_D_OFFSET 1
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#define SYSREG_CONFIG0_D_SIZE 1
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#define SYSREG_CONFIG0_D_SIZE 1
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#define SYSREG_CONFIG0_S_OFFSET 2
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#define SYSREG_CONFIG0_S_OFFSET 2
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#define SYSREG_CONFIG0_S_SIZE 1
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#define SYSREG_CONFIG0_S_SIZE 1
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#define SYSREG_O_OFFSET 3
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#define SYSREG_CONFIG0_O_OFFSET 3
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#define SYSREG_O_SIZE 1
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#define SYSREG_CONFIG0_O_SIZE 1
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#define SYSREG_P_OFFSET 4
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#define SYSREG_CONFIG0_P_OFFSET 4
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#define SYSREG_P_SIZE 1
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#define SYSREG_CONFIG0_P_SIZE 1
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#define SYSREG_CONFIG0_J_OFFSET 5
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#define SYSREG_CONFIG0_J_OFFSET 5
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#define SYSREG_CONFIG0_J_SIZE 1
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#define SYSREG_CONFIG0_J_SIZE 1
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#define SYSREG_F_OFFSET 6
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#define SYSREG_CONFIG0_F_OFFSET 6
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#define SYSREG_F_SIZE 1
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#define SYSREG_CONFIG0_F_SIZE 1
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#define SYSREG_MMUT_OFFSET 7
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#define SYSREG_MMUT_OFFSET 7
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#define SYSREG_MMUT_SIZE 3
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#define SYSREG_MMUT_SIZE 3
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#define SYSREG_AR_OFFSET 10
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#define SYSREG_AR_OFFSET 10
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@ -211,7 +156,7 @@
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#define SYSREG_DSET_OFFSET 6
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#define SYSREG_DSET_OFFSET 6
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#define SYSREG_DSET_SIZE 4
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#define SYSREG_DSET_SIZE 4
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#define SYSREG_IASS_OFFSET 10
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#define SYSREG_IASS_OFFSET 10
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#define SYSREG_IASS_SIZE 2
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#define SYSREG_IASS_SIZE 3
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#define SYSREG_ILSZ_OFFSET 13
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#define SYSREG_ILSZ_OFFSET 13
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#define SYSREG_ILSZ_SIZE 3
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#define SYSREG_ILSZ_SIZE 3
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#define SYSREG_ISET_OFFSET 16
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#define SYSREG_ISET_OFFSET 16
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@ -221,10 +166,6 @@
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#define SYSREG_IMMUSZ_OFFSET 26
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#define SYSREG_IMMUSZ_OFFSET 26
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#define SYSREG_IMMUSZ_SIZE 6
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#define SYSREG_IMMUSZ_SIZE 6
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/* Bitfields in COUNT */
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/* Bitfields in COMPARE */
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/* Bitfields in TLBEHI */
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/* Bitfields in TLBEHI */
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#define SYSREG_ASID_OFFSET 0
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#define SYSREG_ASID_OFFSET 0
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#define SYSREG_ASID_SIZE 8
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#define SYSREG_ASID_SIZE 8
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@ -253,10 +194,6 @@
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#define SYSREG_PFN_OFFSET 10
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#define SYSREG_PFN_OFFSET 10
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#define SYSREG_PFN_SIZE 22
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#define SYSREG_PFN_SIZE 22
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/* Bitfields in PTBR */
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/* Bitfields in TLBEAR */
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/* Bitfields in MMUCR */
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/* Bitfields in MMUCR */
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#define SYSREG_E_OFFSET 0
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#define SYSREG_E_OFFSET 0
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#define SYSREG_E_SIZE 1
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#define SYSREG_E_SIZE 1
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@ -277,19 +214,29 @@
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#define SYSREG_IRP_OFFSET 26
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#define SYSREG_IRP_OFFSET 26
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#define SYSREG_IRP_SIZE 6
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#define SYSREG_IRP_SIZE 6
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/* Bitfields in TLBARLO */
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/* Bitfields in TLBARHI */
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/* Bitfields in PCCNT */
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/* Bitfields in PCNT0 */
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/* Bitfields in PCNT1 */
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/* Bitfields in PCCR */
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/* Bitfields in PCCR */
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#define SYSREG_PCCR_R_OFFSET 1
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/* Bitfields in BEAR */
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#define SYSREG_PCCR_R_SIZE 1
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#define SYSREG_PCCR_C_OFFSET 2
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#define SYSREG_PCCR_C_SIZE 1
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#define SYSREG_PCCR_S_OFFSET 3
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#define SYSREG_PCCR_S_SIZE 1
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#define SYSREG_IEC_OFFSET 4
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#define SYSREG_IEC_SIZE 1
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#define SYSREG_IE0_OFFSET 5
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#define SYSREG_IE0_SIZE 1
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#define SYSREG_IE1_OFFSET 6
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#define SYSREG_IE1_SIZE 1
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#define SYSREG_FC_OFFSET 8
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#define SYSREG_FC_SIZE 1
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#define SYSREG_F0_OFFSET 9
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#define SYSREG_F0_SIZE 1
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#define SYSREG_F1_OFFSET 10
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#define SYSREG_F1_SIZE 1
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#define SYSREG_CONF0_OFFSET 12
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#define SYSREG_CONF0_SIZE 6
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#define SYSREG_CONF1_OFFSET 18
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#define SYSREG_CONF1_SIZE 6
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/* Constants for ECR */
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/* Constants for ECR */
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#define ECR_UNRECOVERABLE 0
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#define ECR_UNRECOVERABLE 0
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#define ECR_TLB_MISS_W 28
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#define ECR_TLB_MISS_W 28
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/* Bit manipulation macros */
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/* Bit manipulation macros */
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#define SYSREG_BIT(name) (1 << SYSREG_##name##_OFFSET)
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#define SYSREG_BIT(name) \
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#define SYSREG_BF(name,value) (((value) & ((1 << SYSREG_##name##_SIZE) - 1)) << SYSREG_##name##_OFFSET)
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(1 << SYSREG_##name##_OFFSET)
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#define SYSREG_BFEXT(name,value) (((value) >> SYSREG_##name##_OFFSET) & ((1 << SYSREG_##name##_SIZE) - 1))
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#define SYSREG_BF(name,value) \
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#define SYSREG_BFINS(name,value,old) (((old) & ~(((1 << SYSREG_##name##_SIZE) - 1) << SYSREG_##name##_OFFSET)) | SYSREG_BF(name,value))
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(((value) & ((1 << SYSREG_##name##_SIZE) - 1)) \
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<< SYSREG_##name##_OFFSET)
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#define SYSREG_BFEXT(name,value)\
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(((value) >> SYSREG_##name##_OFFSET) \
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& ((1 << SYSREG_##name##_SIZE) - 1))
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#define SYSREG_BFINS(name,value,old) \
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(((old) & ~(((1 << SYSREG_##name##_SIZE) - 1) \
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<< SYSREG_##name##_OFFSET)) \
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/* Register access macros */
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#ifdef __CHECKER__
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#ifdef __CHECKER__
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extern unsigned long __builtin_mfsr(unsigned long reg);
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extern unsigned long __builtin_mfsr(unsigned long reg);
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extern void __builtin_mtsr(unsigned long reg, unsigned long value);
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extern void __builtin_mtsr(unsigned long reg, unsigned long value);
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#endif
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#endif
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/* Register access macros */
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#define sysreg_read(reg) __builtin_mfsr(SYSREG_##reg)
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#define sysreg_read(reg) __builtin_mfsr(SYSREG_##reg)
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#define sysreg_write(reg, value) __builtin_mtsr(SYSREG_##reg, value)
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#define sysreg_write(reg, value) __builtin_mtsr(SYSREG_##reg, value)
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#endif /* __ASM_AVR32_SYSREG_H__ */
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#endif /* __ASM_AVR32_SYSREG_H */
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