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Merge branch 'for-next/misc' into for-next/core
* for-next/misc: arm64: Remove duplicate included header arm64/Kconfig: Drop EXECMEM dependency from ARCH_WANTS_EXECMEM_LATE arm64: asm: Fix typo in pgtable.h arm64/mm: Ensure adequate HUGE_MAX_HSTATE arm64/mm: Replace open encodings with PXD_TABLE_BIT arm64/mm: Drop INIT_MM_CONTEXT()
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commit
6e1173306e
5 changed files with 16 additions and 8 deletions
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@ -113,7 +113,7 @@ config ARM64
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select ARCH_WANT_FRAME_POINTERS
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select ARCH_WANT_HUGE_PMD_SHARE if ARM64_4K_PAGES || (ARM64_16K_PAGES && !ARM64_VA_BITS_36)
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select ARCH_WANT_LD_ORPHAN_WARN
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select ARCH_WANTS_EXECMEM_LATE if EXECMEM
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select ARCH_WANTS_EXECMEM_LATE
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select ARCH_WANTS_NO_INSTR
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select ARCH_WANTS_THP_SWAP if ARM64_4K_PAGES
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select ARCH_HAS_UBSAN
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@ -109,8 +109,5 @@ static inline bool kaslr_requires_kpti(void)
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return true;
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}
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#define INIT_MM_CONTEXT(name) \
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.pgd = swapper_pg_dir,
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#endif /* !__ASSEMBLY__ */
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#endif
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@ -896,7 +896,7 @@ static inline bool mm_pud_folded(const struct mm_struct *mm)
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pr_err("%s:%d: bad pud %016llx.\n", __FILE__, __LINE__, pud_val(e))
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#define p4d_none(p4d) (pgtable_l4_enabled() && !p4d_val(p4d))
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#define p4d_bad(p4d) (pgtable_l4_enabled() && !(p4d_val(p4d) & 2))
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#define p4d_bad(p4d) (pgtable_l4_enabled() && !(p4d_val(p4d) & P4D_TABLE_BIT))
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#define p4d_present(p4d) (!p4d_none(p4d))
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static inline void set_p4d(p4d_t *p4dp, p4d_t p4d)
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@ -1023,7 +1023,7 @@ static inline bool mm_p4d_folded(const struct mm_struct *mm)
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pr_err("%s:%d: bad p4d %016llx.\n", __FILE__, __LINE__, p4d_val(e))
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#define pgd_none(pgd) (pgtable_l5_enabled() && !pgd_val(pgd))
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#define pgd_bad(pgd) (pgtable_l5_enabled() && !(pgd_val(pgd) & 2))
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#define pgd_bad(pgd) (pgtable_l5_enabled() && !(pgd_val(pgd) & PGD_TABLE_BIT))
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#define pgd_present(pgd) (!pgd_none(pgd))
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static inline void set_pgd(pgd_t *pgdp, pgd_t pgd)
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@ -1345,7 +1345,7 @@ static inline void ___ptep_set_wrprotect(struct mm_struct *mm,
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}
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/*
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* __ptep_set_wrprotect - mark read-only while trasferring potential hardware
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* __ptep_set_wrprotect - mark read-only while transferring potential hardware
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* dirty status (PTE_DBM && !PTE_RDONLY) to the software PTE_DIRTY bit.
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*/
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static inline void __ptep_set_wrprotect(struct mm_struct *mm,
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@ -23,7 +23,6 @@
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#define SECCOMP_ARCH_NATIVE_NR NR_syscalls
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#define SECCOMP_ARCH_NATIVE_NAME "aarch64"
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#ifdef CONFIG_COMPAT
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#include <asm/unistd_compat_32.h>
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# define SECCOMP_ARCH_COMPAT AUDIT_ARCH_ARM
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# define SECCOMP_ARCH_COMPAT_NR __NR_compat32_syscalls
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# define SECCOMP_ARCH_COMPAT_NAME "arm"
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@ -519,6 +519,18 @@ pte_t huge_ptep_clear_flush(struct vm_area_struct *vma,
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static int __init hugetlbpage_init(void)
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{
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/*
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* HugeTLB pages are supported on maximum four page table
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* levels (PUD, CONT PMD, PMD, CONT PTE) for a given base
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* page size, corresponding to hugetlb_add_hstate() calls
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* here.
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*
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* HUGE_MAX_HSTATE should at least match maximum supported
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* HugeTLB page sizes on the platform. Any new addition to
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* supported HugeTLB page sizes will also require changing
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* HUGE_MAX_HSTATE as well.
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*/
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BUILD_BUG_ON(HUGE_MAX_HSTATE < 4);
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if (pud_sect_supported())
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hugetlb_add_hstate(PUD_SHIFT - PAGE_SHIFT);
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