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https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
synced 2025-01-24 09:13:20 -05:00
Power management fixes for 6.7-rc4
- Fix the AMD P-state driver's EPP sysfs interface in the cases when the performance governor is in use (Ayush Jain). - Make the ->fast_switch() callback in the AMD P-state driver return the target frequency as expected (Gautham R. Shenoy). - Allow user space to control the range of frequencies to use via scaling_min_freq and scaling_max_freq when AMD P-state driver is in use (Wyes Karny). - Prevent power domains needed for wakeup signaling from being turned off during system suspend on Qualcomm systems and prevent performance states votes from runtime-suspended devices from being lost across a system suspend-resume cycle in qcom-cpufreq-nvmem (Stephan Gerhold). - Fix disabling the 792 Mhz OPP in the imx6q cpufreq driver for the i.MX6ULL types that can run at that frequency (Christoph Niedermaier). - Eliminate unnecessary and harmful conversions to uW from the DTPM (dynamic thermal and power management) framework (Lukasz Luba). -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAmVqSX8SHHJqd0Byand5 c29ja2kubmV0AAoJEILEb/54YlRxoGMP/1FOjpggmrnlRw9mwZqeyJPSg60A9JSJ 2/OMFc5Up3taWn2YVayk9GI9zbkv6GlVOuJvPFQmi6O6vAG8uYuJUIns/8jnGE4b qT7wUKJmXrOakkyJgwByafsjjTqdV+IyVYiTlfbuyGby1I2GlGa+GGMvEbXGZdfz DwOmB2O+3GkxrVnbN39BXsapONAdjEeTuEB1U8bjNohhow08GhbC32B4fbJirsAA kmtPH94UX20JguXw9PXcszlyZWM0wEux2hXcJ2WrRid1O/Iz9/NbNEKMKGJ7CLFo SSh9Lkx+kjLnNnmY6XkH7wPqyBT/seDzPyn2vHD3p0KFoc69ca+zhcplJKNSgvuO k4kTllXfvC6x27eoBMOLfaGhYMbQgpzZ2LKZp0FF3lTa/a6JjAV4Hc2AisAGnGeu 5QZ2UjZAZg1Pq/SmOjQtKNupY8LGt99vxmHLs+CPcJIm//dKmshkOQ3eOoOKl/0W e/B6tBenJGcTUU7B56cdtyeGAFdozqIEn9EQEtCswv1kLmbVvDeVGNcBRahADQXa EXqUcdCwWM+4ARV4Bim9ZwB4pRjtvEtM9qri5RDxTXZMgFWm3MOKDj0S9mxX7Aps 7pQdtSM4Xa44suP7+oDHfw4c8kTEDyyj5PEW2lWtNfCsnsUBwCfcQx3jg0j9lY9o KtBJ8f+4Acku =/TF9 -----END PGP SIGNATURE----- Merge tag 'pm-6.7-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management fixes from Rafael Wysocki: "These fix issues in two cpufreq drivers, in the AMD P-state driver and in the power-capping DTPM framework. Specifics: - Fix the AMD P-state driver's EPP sysfs interface in the cases when the performance governor is in use (Ayush Jain) - Make the ->fast_switch() callback in the AMD P-state driver return the target frequency as expected (Gautham R. Shenoy) - Allow user space to control the range of frequencies to use via scaling_min_freq and scaling_max_freq when AMD P-state driver is in use (Wyes Karny) - Prevent power domains needed for wakeup signaling from being turned off during system suspend on Qualcomm systems and prevent performance states votes from runtime-suspended devices from being lost across a system suspend-resume cycle in qcom-cpufreq-nvmem (Stephan Gerhold) - Fix disabling the 792 Mhz OPP in the imx6q cpufreq driver for the i.MX6ULL types that can run at that frequency (Christoph Niedermaier) - Eliminate unnecessary and harmful conversions to uW from the DTPM (dynamic thermal and power management) framework (Lukasz Luba)" * tag 'pm-6.7-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: cpufreq/amd-pstate: Only print supported EPP values for performance governor cpufreq/amd-pstate: Fix scaling_min_freq and scaling_max_freq update powercap: DTPM: Fix unneeded conversions to micro-Watts cpufreq/amd-pstate: Fix the return value of amd_pstate_fast_switch() pmdomain: qcom: rpmpd: Set GENPD_FLAG_ACTIVE_WAKEUP cpufreq: qcom-nvmem: Preserve PM domain votes in system suspend cpufreq: qcom-nvmem: Enable virtual power domain devices cpufreq: imx6q: Don't disable 792 Mhz OPP unnecessarily
This commit is contained in:
commit
815fb87b75
7 changed files with 136 additions and 32 deletions
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@ -307,11 +307,11 @@ static int pstate_init_perf(struct amd_cpudata *cpudata)
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highest_perf = AMD_CPPC_HIGHEST_PERF(cap1);
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WRITE_ONCE(cpudata->highest_perf, highest_perf);
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WRITE_ONCE(cpudata->max_limit_perf, highest_perf);
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WRITE_ONCE(cpudata->nominal_perf, AMD_CPPC_NOMINAL_PERF(cap1));
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WRITE_ONCE(cpudata->lowest_nonlinear_perf, AMD_CPPC_LOWNONLIN_PERF(cap1));
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WRITE_ONCE(cpudata->lowest_perf, AMD_CPPC_LOWEST_PERF(cap1));
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WRITE_ONCE(cpudata->min_limit_perf, AMD_CPPC_LOWEST_PERF(cap1));
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return 0;
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}
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@ -329,11 +329,12 @@ static int cppc_init_perf(struct amd_cpudata *cpudata)
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highest_perf = cppc_perf.highest_perf;
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WRITE_ONCE(cpudata->highest_perf, highest_perf);
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WRITE_ONCE(cpudata->max_limit_perf, highest_perf);
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WRITE_ONCE(cpudata->nominal_perf, cppc_perf.nominal_perf);
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WRITE_ONCE(cpudata->lowest_nonlinear_perf,
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cppc_perf.lowest_nonlinear_perf);
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WRITE_ONCE(cpudata->lowest_perf, cppc_perf.lowest_perf);
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WRITE_ONCE(cpudata->min_limit_perf, cppc_perf.lowest_perf);
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if (cppc_state == AMD_PSTATE_ACTIVE)
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return 0;
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@ -432,6 +433,10 @@ static void amd_pstate_update(struct amd_cpudata *cpudata, u32 min_perf,
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u64 prev = READ_ONCE(cpudata->cppc_req_cached);
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u64 value = prev;
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min_perf = clamp_t(unsigned long, min_perf, cpudata->min_limit_perf,
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cpudata->max_limit_perf);
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max_perf = clamp_t(unsigned long, max_perf, cpudata->min_limit_perf,
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cpudata->max_limit_perf);
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des_perf = clamp_t(unsigned long, des_perf, min_perf, max_perf);
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if ((cppc_state == AMD_PSTATE_GUIDED) && (gov_flags & CPUFREQ_GOV_DYNAMIC_SWITCHING)) {
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@ -470,6 +475,22 @@ static int amd_pstate_verify(struct cpufreq_policy_data *policy)
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return 0;
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}
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static int amd_pstate_update_min_max_limit(struct cpufreq_policy *policy)
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{
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u32 max_limit_perf, min_limit_perf;
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struct amd_cpudata *cpudata = policy->driver_data;
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max_limit_perf = div_u64(policy->max * cpudata->highest_perf, cpudata->max_freq);
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min_limit_perf = div_u64(policy->min * cpudata->highest_perf, cpudata->max_freq);
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WRITE_ONCE(cpudata->max_limit_perf, max_limit_perf);
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WRITE_ONCE(cpudata->min_limit_perf, min_limit_perf);
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WRITE_ONCE(cpudata->max_limit_freq, policy->max);
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WRITE_ONCE(cpudata->min_limit_freq, policy->min);
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return 0;
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}
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static int amd_pstate_update_freq(struct cpufreq_policy *policy,
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unsigned int target_freq, bool fast_switch)
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{
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@ -480,6 +501,9 @@ static int amd_pstate_update_freq(struct cpufreq_policy *policy,
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if (!cpudata->max_freq)
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return -ENODEV;
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if (policy->min != cpudata->min_limit_freq || policy->max != cpudata->max_limit_freq)
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amd_pstate_update_min_max_limit(policy);
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cap_perf = READ_ONCE(cpudata->highest_perf);
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min_perf = READ_ONCE(cpudata->lowest_perf);
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max_perf = cap_perf;
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@ -518,7 +542,9 @@ static int amd_pstate_target(struct cpufreq_policy *policy,
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static unsigned int amd_pstate_fast_switch(struct cpufreq_policy *policy,
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unsigned int target_freq)
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{
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return amd_pstate_update_freq(policy, target_freq, true);
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if (!amd_pstate_update_freq(policy, target_freq, true))
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return target_freq;
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return policy->cur;
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}
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static void amd_pstate_adjust_perf(unsigned int cpu,
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@ -532,6 +558,10 @@ static void amd_pstate_adjust_perf(unsigned int cpu,
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struct amd_cpudata *cpudata = policy->driver_data;
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unsigned int target_freq;
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if (policy->min != cpudata->min_limit_freq || policy->max != cpudata->max_limit_freq)
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amd_pstate_update_min_max_limit(policy);
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cap_perf = READ_ONCE(cpudata->highest_perf);
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lowest_nonlinear_perf = READ_ONCE(cpudata->lowest_nonlinear_perf);
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max_freq = READ_ONCE(cpudata->max_freq);
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@ -745,6 +775,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
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/* Initial processor data capability frequencies */
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cpudata->max_freq = max_freq;
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cpudata->min_freq = min_freq;
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cpudata->max_limit_freq = max_freq;
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cpudata->min_limit_freq = min_freq;
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cpudata->nominal_freq = nominal_freq;
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cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
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@ -850,11 +882,16 @@ static ssize_t show_energy_performance_available_preferences(
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{
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int i = 0;
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int offset = 0;
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struct amd_cpudata *cpudata = policy->driver_data;
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if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE)
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return sysfs_emit_at(buf, offset, "%s\n",
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energy_perf_strings[EPP_INDEX_PERFORMANCE]);
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while (energy_perf_strings[i] != NULL)
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offset += sysfs_emit_at(buf, offset, "%s ", energy_perf_strings[i++]);
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sysfs_emit_at(buf, offset, "\n");
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offset += sysfs_emit_at(buf, offset, "\n");
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return offset;
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}
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@ -1183,16 +1220,25 @@ static int amd_pstate_epp_cpu_exit(struct cpufreq_policy *policy)
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return 0;
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}
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static void amd_pstate_epp_init(unsigned int cpu)
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static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy)
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{
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struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
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struct amd_cpudata *cpudata = policy->driver_data;
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u32 max_perf, min_perf;
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u32 max_perf, min_perf, min_limit_perf, max_limit_perf;
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u64 value;
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s16 epp;
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max_perf = READ_ONCE(cpudata->highest_perf);
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min_perf = READ_ONCE(cpudata->lowest_perf);
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max_limit_perf = div_u64(policy->max * cpudata->highest_perf, cpudata->max_freq);
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min_limit_perf = div_u64(policy->min * cpudata->highest_perf, cpudata->max_freq);
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max_perf = clamp_t(unsigned long, max_perf, cpudata->min_limit_perf,
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cpudata->max_limit_perf);
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min_perf = clamp_t(unsigned long, min_perf, cpudata->min_limit_perf,
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cpudata->max_limit_perf);
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WRITE_ONCE(cpudata->max_limit_perf, max_limit_perf);
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WRITE_ONCE(cpudata->min_limit_perf, min_limit_perf);
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value = READ_ONCE(cpudata->cppc_req_cached);
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@ -1210,9 +1256,6 @@ static void amd_pstate_epp_init(unsigned int cpu)
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value &= ~AMD_CPPC_DES_PERF(~0L);
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value |= AMD_CPPC_DES_PERF(0);
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if (cpudata->epp_policy == cpudata->policy)
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goto skip_epp;
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cpudata->epp_policy = cpudata->policy;
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/* Get BIOS pre-defined epp value */
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@ -1222,7 +1265,7 @@ static void amd_pstate_epp_init(unsigned int cpu)
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* This return value can only be negative for shared_memory
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* systems where EPP register read/write not supported.
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*/
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goto skip_epp;
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return;
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}
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if (cpudata->policy == CPUFREQ_POLICY_PERFORMANCE)
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@ -1236,8 +1279,6 @@ static void amd_pstate_epp_init(unsigned int cpu)
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WRITE_ONCE(cpudata->cppc_req_cached, value);
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amd_pstate_set_epp(cpudata, epp);
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skip_epp:
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cpufreq_cpu_put(policy);
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}
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static int amd_pstate_epp_set_policy(struct cpufreq_policy *policy)
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@ -1252,7 +1293,7 @@ static int amd_pstate_epp_set_policy(struct cpufreq_policy *policy)
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cpudata->policy = policy->policy;
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amd_pstate_epp_init(policy->cpu);
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amd_pstate_epp_update_limit(policy);
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return 0;
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}
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@ -327,7 +327,7 @@ static int imx6ul_opp_check_speed_grading(struct device *dev)
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imx6x_disable_freq_in_opp(dev, 696000000);
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if (of_machine_is_compatible("fsl,imx6ull")) {
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if (val != OCOTP_CFG3_6ULL_SPEED_792MHZ)
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if (val < OCOTP_CFG3_6ULL_SPEED_792MHZ)
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imx6x_disable_freq_in_opp(dev, 792000000);
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if (val != OCOTP_CFG3_6ULL_SPEED_900MHZ)
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@ -23,8 +23,10 @@
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#include <linux/nvmem-consumer.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_opp.h>
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#include <linux/pm_runtime.h>
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#include <linux/slab.h>
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#include <linux/soc/qcom/smem.h>
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@ -55,6 +57,7 @@ struct qcom_cpufreq_match_data {
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struct qcom_cpufreq_drv_cpu {
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int opp_token;
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struct device **virt_devs;
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};
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struct qcom_cpufreq_drv {
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@ -424,6 +427,30 @@ static const struct qcom_cpufreq_match_data match_data_ipq8074 = {
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.get_version = qcom_cpufreq_ipq8074_name_version,
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};
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static void qcom_cpufreq_suspend_virt_devs(struct qcom_cpufreq_drv *drv, unsigned int cpu)
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{
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const char * const *name = drv->data->genpd_names;
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int i;
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if (!drv->cpus[cpu].virt_devs)
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return;
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for (i = 0; *name; i++, name++)
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device_set_awake_path(drv->cpus[cpu].virt_devs[i]);
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}
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static void qcom_cpufreq_put_virt_devs(struct qcom_cpufreq_drv *drv, unsigned int cpu)
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{
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const char * const *name = drv->data->genpd_names;
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int i;
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if (!drv->cpus[cpu].virt_devs)
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return;
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for (i = 0; *name; i++, name++)
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pm_runtime_put(drv->cpus[cpu].virt_devs[i]);
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}
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static int qcom_cpufreq_probe(struct platform_device *pdev)
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{
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struct qcom_cpufreq_drv *drv;
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@ -478,6 +505,7 @@ static int qcom_cpufreq_probe(struct platform_device *pdev)
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of_node_put(np);
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for_each_possible_cpu(cpu) {
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struct device **virt_devs = NULL;
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struct dev_pm_opp_config config = {
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.supported_hw = NULL,
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};
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@ -498,7 +526,7 @@ static int qcom_cpufreq_probe(struct platform_device *pdev)
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if (drv->data->genpd_names) {
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config.genpd_names = drv->data->genpd_names;
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config.virt_devs = NULL;
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config.virt_devs = &virt_devs;
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}
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if (config.supported_hw || config.genpd_names) {
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|
@ -509,6 +537,27 @@ static int qcom_cpufreq_probe(struct platform_device *pdev)
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goto free_opp;
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}
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}
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if (virt_devs) {
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const char * const *name = config.genpd_names;
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int i, j;
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|
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for (i = 0; *name; i++, name++) {
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ret = pm_runtime_resume_and_get(virt_devs[i]);
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if (ret) {
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dev_err(cpu_dev, "failed to resume %s: %d\n",
|
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*name, ret);
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|
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/* Rollback previous PM runtime calls */
|
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name = config.genpd_names;
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for (j = 0; *name && j < i; j++, name++)
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pm_runtime_put(virt_devs[j]);
|
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|
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goto free_opp;
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}
|
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}
|
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drv->cpus[cpu].virt_devs = virt_devs;
|
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}
|
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}
|
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|
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cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
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|
@ -522,8 +571,10 @@ static int qcom_cpufreq_probe(struct platform_device *pdev)
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dev_err(cpu_dev, "Failed to register platform device\n");
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|
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free_opp:
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for_each_possible_cpu(cpu)
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for_each_possible_cpu(cpu) {
|
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qcom_cpufreq_put_virt_devs(drv, cpu);
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dev_pm_opp_clear_config(drv->cpus[cpu].opp_token);
|
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}
|
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return ret;
|
||||
}
|
||||
|
||||
|
@ -534,15 +585,31 @@ static void qcom_cpufreq_remove(struct platform_device *pdev)
|
|||
|
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platform_device_unregister(cpufreq_dt_pdev);
|
||||
|
||||
for_each_possible_cpu(cpu)
|
||||
for_each_possible_cpu(cpu) {
|
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qcom_cpufreq_put_virt_devs(drv, cpu);
|
||||
dev_pm_opp_clear_config(drv->cpus[cpu].opp_token);
|
||||
}
|
||||
}
|
||||
|
||||
static int qcom_cpufreq_suspend(struct device *dev)
|
||||
{
|
||||
struct qcom_cpufreq_drv *drv = dev_get_drvdata(dev);
|
||||
unsigned int cpu;
|
||||
|
||||
for_each_possible_cpu(cpu)
|
||||
qcom_cpufreq_suspend_virt_devs(drv, cpu);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static DEFINE_SIMPLE_DEV_PM_OPS(qcom_cpufreq_pm_ops, qcom_cpufreq_suspend, NULL);
|
||||
|
||||
static struct platform_driver qcom_cpufreq_driver = {
|
||||
.probe = qcom_cpufreq_probe,
|
||||
.remove_new = qcom_cpufreq_remove,
|
||||
.driver = {
|
||||
.name = "qcom-cpufreq-nvmem",
|
||||
.pm = pm_sleep_ptr(&qcom_cpufreq_pm_ops),
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
@ -1044,6 +1044,7 @@ static int rpmpd_probe(struct platform_device *pdev)
|
|||
rpmpds[i]->pd.power_off = rpmpd_power_off;
|
||||
rpmpds[i]->pd.power_on = rpmpd_power_on;
|
||||
rpmpds[i]->pd.set_performance_state = rpmpd_set_performance;
|
||||
rpmpds[i]->pd.flags = GENPD_FLAG_ACTIVE_WAKEUP;
|
||||
pm_genpd_init(&rpmpds[i]->pd, NULL, true);
|
||||
|
||||
data->domains[i] = &rpmpds[i]->pd;
|
||||
|
|
|
@ -24,7 +24,6 @@
|
|||
#include <linux/of.h>
|
||||
#include <linux/pm_qos.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/units.h>
|
||||
|
||||
struct dtpm_cpu {
|
||||
struct dtpm dtpm;
|
||||
|
@ -104,8 +103,7 @@ static u64 get_pd_power_uw(struct dtpm *dtpm)
|
|||
if (pd->table[i].frequency < freq)
|
||||
continue;
|
||||
|
||||
return scale_pd_power_uw(pd_mask, pd->table[i].power *
|
||||
MICROWATT_PER_MILLIWATT);
|
||||
return scale_pd_power_uw(pd_mask, pd->table[i].power);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -122,11 +120,9 @@ static int update_pd_power_uw(struct dtpm *dtpm)
|
|||
nr_cpus = cpumask_weight(&cpus);
|
||||
|
||||
dtpm->power_min = em->table[0].power;
|
||||
dtpm->power_min *= MICROWATT_PER_MILLIWATT;
|
||||
dtpm->power_min *= nr_cpus;
|
||||
|
||||
dtpm->power_max = em->table[em->nr_perf_states - 1].power;
|
||||
dtpm->power_max *= MICROWATT_PER_MILLIWATT;
|
||||
dtpm->power_max *= nr_cpus;
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -39,10 +39,8 @@ static int update_pd_power_uw(struct dtpm *dtpm)
|
|||
struct em_perf_domain *pd = em_pd_get(dev);
|
||||
|
||||
dtpm->power_min = pd->table[0].power;
|
||||
dtpm->power_min *= MICROWATT_PER_MILLIWATT;
|
||||
|
||||
dtpm->power_max = pd->table[pd->nr_perf_states - 1].power;
|
||||
dtpm->power_max *= MICROWATT_PER_MILLIWATT;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -54,13 +52,10 @@ static u64 set_pd_power_limit(struct dtpm *dtpm, u64 power_limit)
|
|||
struct device *dev = devfreq->dev.parent;
|
||||
struct em_perf_domain *pd = em_pd_get(dev);
|
||||
unsigned long freq;
|
||||
u64 power;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < pd->nr_perf_states; i++) {
|
||||
|
||||
power = pd->table[i].power * MICROWATT_PER_MILLIWATT;
|
||||
if (power > power_limit)
|
||||
if (pd->table[i].power > power_limit)
|
||||
break;
|
||||
}
|
||||
|
||||
|
@ -68,7 +63,7 @@ static u64 set_pd_power_limit(struct dtpm *dtpm, u64 power_limit)
|
|||
|
||||
dev_pm_qos_update_request(&dtpm_devfreq->qos_req, freq);
|
||||
|
||||
power_limit = pd->table[i - 1].power * MICROWATT_PER_MILLIWATT;
|
||||
power_limit = pd->table[i - 1].power;
|
||||
|
||||
return power_limit;
|
||||
}
|
||||
|
@ -110,7 +105,7 @@ static u64 get_pd_power_uw(struct dtpm *dtpm)
|
|||
if (pd->table[i].frequency < freq)
|
||||
continue;
|
||||
|
||||
power = pd->table[i].power * MICROWATT_PER_MILLIWATT;
|
||||
power = pd->table[i].power;
|
||||
power *= status.busy_time;
|
||||
power >>= 10;
|
||||
|
||||
|
|
|
@ -70,6 +70,10 @@ struct amd_cpudata {
|
|||
u32 nominal_perf;
|
||||
u32 lowest_nonlinear_perf;
|
||||
u32 lowest_perf;
|
||||
u32 min_limit_perf;
|
||||
u32 max_limit_perf;
|
||||
u32 min_limit_freq;
|
||||
u32 max_limit_freq;
|
||||
|
||||
u32 max_freq;
|
||||
u32 min_freq;
|
||||
|
|
Loading…
Add table
Reference in a new issue