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genirq: Provide IRQCHIP_MOVE_DEFERRED
The logic of GENERIC_PENDING_IRQ is backwards for historical reasons. Most interrupt controllers allow to move the interrupt from arbitrary contexts. If GENERIC_PENDING_IRQ is enabled by an architecture to support a chip, which requires the affinity change to happen in interrupt context, all other chips have to be marked with IRQF_MOVE_PCNTXT. That's tedious and there is no real good reason for the extra flags in the irq descriptor and the irq data status fields. In fact the decision whether interrupts can be moved in arbitrary context or not is a property of the interrupt chip. To simplify adoption for RISC-V provide a new mechanism which is enabled via a config switch and allows to add a flag to irq_chip::flags to request that interrupt affinity changes are deferred. Setting the top level chip of an interrupt evaluates the flag and maps it into the existing logic. The config switch and the various PCNTXT flags are temporary until x86 is converted over to this scheme. This intermediate step also allows trivial backporting of the mechanism to plug the affinity change race of various RISC-V interrupt controllers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/all/20241210103335.500314436@linutronix.de
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parent
65d09d269f
commit
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4 changed files with 22 additions and 3 deletions
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@ -567,6 +567,7 @@ struct irq_chip {
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* in the suspend path if they are in disabled state
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* IRQCHIP_AFFINITY_PRE_STARTUP: Default affinity update before startup
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* IRQCHIP_IMMUTABLE: Don't ever change anything in this chip
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* IRQCHIP_MOVE_DEFERRED: Move the interrupt in actual interrupt context
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*/
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enum {
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IRQCHIP_SET_TYPE_MASKED = (1 << 0),
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@ -581,6 +582,7 @@ enum {
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IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND = (1 << 9),
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IRQCHIP_AFFINITY_PRE_STARTUP = (1 << 10),
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IRQCHIP_IMMUTABLE = (1 << 11),
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IRQCHIP_MOVE_DEFERRED = (1 << 12),
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};
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#include <linux/irqdesc.h>
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@ -31,6 +31,10 @@ config GENERIC_IRQ_EFFECTIVE_AFF_MASK
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config GENERIC_PENDING_IRQ
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bool
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# Deduce delayed migration from top-level interrupt chip flags
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config GENERIC_PENDING_IRQ_CHIPFLAGS
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bool
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# Support for generic irq migrating off cpu before the cpu is offline.
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config GENERIC_IRQ_MIGRATION
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bool
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@ -47,6 +47,13 @@ int irq_set_chip(unsigned int irq, const struct irq_chip *chip)
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return -EINVAL;
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desc->irq_data.chip = (struct irq_chip *)(chip ?: &no_irq_chip);
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if (IS_ENABLED(CONFIG_GENERIC_PENDING_IRQ_CHIPFLAGS) && chip) {
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if (chip->flags & IRQCHIP_MOVE_DEFERRED)
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irqd_clear(&desc->irq_data, IRQD_MOVE_PCNTXT);
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else
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irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
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}
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irq_put_desc_unlock(desc, flags);
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/*
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* For !CONFIG_SPARSE_IRQ make the irq show up in
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@ -1114,16 +1121,21 @@ void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
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trigger = irqd_get_trigger_type(&desc->irq_data);
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irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
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IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
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IRQD_TRIGGER_MASK | IRQD_LEVEL);
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if (irq_settings_has_no_balance_set(desc))
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irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
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if (irq_settings_is_per_cpu(desc))
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irqd_set(&desc->irq_data, IRQD_PER_CPU);
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if (irq_settings_can_move_pcntxt(desc))
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irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
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if (irq_settings_is_level(desc))
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irqd_set(&desc->irq_data, IRQD_LEVEL);
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/* Keep this around until x86 is converted over */
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if (!IS_ENABLED(CONFIG_GENERIC_PENDING_IRQ_CHIPFLAGS)) {
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irqd_clear(&desc->irq_data, IRQD_MOVE_PCNTXT);
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if (irq_settings_can_move_pcntxt(desc))
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irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
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}
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tmp = irq_settings_get_trigger_mask(desc);
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if (tmp != IRQ_TYPE_NONE)
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trigger = tmp;
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@ -53,6 +53,7 @@ static const struct irq_bit_descr irqchip_flags[] = {
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BIT_MASK_DESCR(IRQCHIP_SUPPORTS_NMI),
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BIT_MASK_DESCR(IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND),
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BIT_MASK_DESCR(IRQCHIP_IMMUTABLE),
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BIT_MASK_DESCR(IRQCHIP_MOVE_DEFERRED),
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};
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static void
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