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dt-bindings: fpga: fpga-region: Convert to sugar syntax

Browse source 
Using overlay sugar syntax makes the DTS files easier to read (and
write).

While at it, fix two build issues:
  - "/dts-v1/" and "/plugin/" must be separate statements.
  - Add a missing closing curly brace.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
This commit is contained in:
Geert Uytterhoeven 2021-04-02 13:57:49 +02:00 • committed by Moritz Fischer
parent 9a8d3cda8d
commit f9d2d86dc5
1 changed files with 75 additions and 92 deletions
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53
Documentation/devicetree/bindings/fpga/fpga-region.txt
View file

@ -245,13 +245,10 @@ Base tree contains:
Overlay contains:
/dts-v1/ /plugin/;
/ {
fragment@0 {
target = <&fpga_region0>;
#address-cells = <1>;
#size-cells = <1>;
__overlay__ {
/dts-v1/;
/plugin/;
&fpga_region0 {
#address-cells = <1>;
#size-cells = <1>;
@ -275,8 +272,6 @@ Overlay contains:
reg = <0x0 0x10000>;
};
};
};
};
Supported Use Models
@ -371,13 +366,11 @@ Live Device Tree contains:
};
DT Overlay contains:
/dts-v1/ /plugin/;
/ {
fragment@0 {
target = <&fpga_region0>;
#address-cells = <1>;
#size-cells = <1>;
__overlay__ {
/dts-v1/;
/plugin/;
&fpga_region0 {
#address-cells = <1>;
#size-cells = <1>;
@ -391,7 +384,6 @@ fragment@0 {
xlnx,gpio-width= <0x6>;
};
};
};
Device Tree Example: Full Reconfiguration to add PRR's
======================================================
@ -402,13 +394,11 @@ This example programs the FPGA to have two regions that can later be partially
configured. Each region has its own bridge in the FPGA fabric.
DT Overlay contains:
/dts-v1/ /plugin/;
/ {
fragment@0 {
target = <&fpga_region0>;
#address-cells = <1>;
#size-cells = <1>;
__overlay__ {
/dts-v1/;
/plugin/;
&fpga_region0 {
#address-cells = <1>;
#size-cells = <1>;
@ -438,8 +428,6 @@ DT Overlay contains:
};
};
};
};
};
Device Tree Example: Partial Reconfiguration
============================================
@ -451,13 +439,10 @@ differences are that the FPGA is partially reconfigured due to the
"partial-fpga-config" boolean and the only bridge that is controlled during
programming is the FPGA based bridge of fpga_region1.
/dts-v1/ /plugin/;
/ {
fragment@0 {
target = <&fpga_region1>;
#address-cells = <1>;
#size-cells = <1>;
__overlay__ {
/dts-v1/;
/plugin/;
&fpga_region1 {
#address-cells = <1>;
#size-cells = <1>;
@ -473,8 +458,6 @@ programming is the FPGA based bridge of fpga_region1.
gpio-controller;
};
};
};
};
Constraints
===========