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linux/include/dt-bindings/reset
Linus Torvalds 9f3a2ba62c The core framework gained a clk provider helper, a clk consumer helper, and
some unit tests for the assigned clk rates feature in DeviceTree. On the vendor
 driver side, we gained a whole pile of SoC driver support detailed below. The
 majority in the diffstat is Qualcomm, but there's also quite a few Samsung and
 Mediatek clk driver additions in here as well. The top vendors is quite common,
 but the sheer amount of new drivers is uncommon, so I'm anticipating a larger
 number of fixes for clk drivers this cycle.
 
 Core:
  - devm_clk_bulk_get_all_enabled() to return number of clks acquired
  - devm_clk_hw_register_gate_parent_hw() helper to modernize drivers
  - KUnit tests for clk-assigned-rates{,-u64}
 
 New Drivers:
  - Marvell PXA1908 SoC clks
  - Mobileye EyeQ5, EyeQ6L and EyeQ6H clk driver
  - TWL6030 clk driver
  - Nuvoton Arbel BMC NPCM8XX SoC clks
  - MediaTek MT6735 SoC clks
  - MediaTek MT7620, MT7628 and MT7688 MMC clks
  - Add a driver for gated fixed rate clocks
  - Global clock controllers for Qualcomm QCS8300 and IPQ5424 SoCs
  - Camera, display and video clock controllers for Qualcomm SA8775P SoCs
  - Global, display, GPU, TCSR, and RPMh clock controllers for Qualcomm SAR2130P
  - Global, camera, display, GPU, and video clock controllers for Qualcomm
    SM8475 SoCs
  - RTC power domain and Battery Backup Function (VBATTB) clock support for the
    Renesas RZ/G3S SoC
  - Qualcomm IPQ9574 alpha PLLs
  - Support for i.MX91 CCM in the i.MX93 driver
  - Microchip LAN969X SoC clks
  - Cortex-A55 core clocks and Interrupt Control Unit (ICU) clock and reset on
    Renesas RZ/V2H(P)
  - Samsung ExynosAutov920 clk drivers for PERIC1, MISC, HSI0 and HSI1
  - Samsung Exynos8895 clk drivers for FSYS0/1, PERIC0/1, PERIS and TOP
 
 Updates:
  - Convert more clk bindings to YAML
  - Various clk driver cleanups: NULL checks, add const, etc.
  - Remove END/NUM #defines that count number of clks in various binding headers
  - Continue moving reset drivers to drivers/reset via auxiliary bus
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
 "The core framework gained a clk provider helper, a clk consumer
  helper, and some unit tests for the assigned clk rates feature in
  DeviceTree. On the vendor driver side, we gained a whole pile of SoC
  driver support detailed below. The majority in the diffstat is
  Qualcomm, but there's also quite a few Samsung and Mediatek clk driver
  additions in here as well. The top vendors is quite common, but the
  sheer amount of new drivers is uncommon, so I'm anticipating a larger
  number of fixes for clk drivers this cycle.

  Core:
   - devm_clk_bulk_get_all_enabled() to return number of clks acquired
   - devm_clk_hw_register_gate_parent_hw() helper to modernize drivers
   - KUnit tests for clk-assigned-rates{,-u64}

  New Drivers:
   - Marvell PXA1908 SoC clks
   - Mobileye EyeQ5, EyeQ6L and EyeQ6H clk driver
   - TWL6030 clk driver
   - Nuvoton Arbel BMC NPCM8XX SoC clks
   - MediaTek MT6735 SoC clks
   - MediaTek MT7620, MT7628 and MT7688 MMC clks
   - Add a driver for gated fixed rate clocks
   - Global clock controllers for Qualcomm QCS8300 and IPQ5424 SoCs
   - Camera, display and video clock controllers for Qualcomm SA8775P
     SoCs
   - Global, display, GPU, TCSR, and RPMh clock controllers for Qualcomm
     SAR2130P
   - Global, camera, display, GPU, and video clock controllers for
     Qualcomm SM8475 SoCs
   - RTC power domain and Battery Backup Function (VBATTB) clock support
     for the Renesas RZ/G3S SoC
   - Qualcomm IPQ9574 alpha PLLs
   - Support for i.MX91 CCM in the i.MX93 driver
   - Microchip LAN969X SoC clks
   - Cortex-A55 core clocks and Interrupt Control Unit (ICU) clock and
     reset on Renesas RZ/V2H(P)
   - Samsung ExynosAutov920 clk drivers for PERIC1, MISC, HSI0 and HSI1
   - Samsung Exynos8895 clk drivers for FSYS0/1, PERIC0/1, PERIS and TOP

  Updates:
   - Convert more clk bindings to YAML
   - Various clk driver cleanups: NULL checks, add const, etc.
   - Remove END/NUM #defines that count number of clks in various
     binding headers
   - Continue moving reset drivers to drivers/reset via auxiliary bus"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (162 commits)
  clk: clk-loongson2: Fix potential buffer overflow in flexible-array member access
  clk: Fix invalid execution of clk_set_rate
  clk: clk-loongson2: Fix memory corruption bug in struct loongson2_clk_provider
  clk: lan966x: make it selectable for ARCH_LAN969X
  clk: eyeq: add EyeQ6H west fixed factor clocks
  clk: eyeq: add EyeQ6H central fixed factor clocks
  clk: eyeq: add EyeQ5 fixed factor clocks
  clk: eyeq: add fixed factor clocks infrastructure
  clk: eyeq: require clock index with phandle in all cases
  clk: fixed-factor: add clk_hw_register_fixed_factor_index() function
  dt-bindings: clock: eyeq: add more Mobileye EyeQ5/EyeQ6H clocks
  dt-bindings: soc: mobileye: set `#clock-cells = <1>` for all compatibles
  clk: clk-axi-clkgen: make sure to enable the AXI bus clock
  dt-bindings: clock: axi-clkgen: include AXI clk
  clk: mmp: Add Marvell PXA1908 MPMU driver
  clk: mmp: Add Marvell PXA1908 APMU driver
  clk: mmp: Add Marvell PXA1908 APBCP driver
  clk: mmp: Add Marvell PXA1908 APBC driver
  dt-bindings: clock: Add Marvell PXA1908 clock bindings
  clk: mmp: Switch to use struct u32_fract instead of custom one
  ...
2024-11-22 17:02:25 -08:00
..
actions,s500-reset.h
actions,s700-reset.h
actions,s900-reset.h
airoha,en7581-reset.h dt-bindings: clock: airoha: Add reset support to EN7581 clock binding 2024-07-08 12:08:43 -07:00
altr,rst-mgr-a10.h
altr,rst-mgr-a10sr.h
altr,rst-mgr-s10.h
altr,rst-mgr.h
amlogic,c3-reset.h
amlogic,meson-a1-reset.h
amlogic,meson-axg-audio-arb.h
amlogic,meson-axg-reset.h
amlogic,meson-g12a-audio-reset.h
amlogic,meson-g12a-reset.h
amlogic,meson-gxbb-reset.h
amlogic,meson-s4-reset.h
amlogic,meson8b-clkc-reset.h
amlogic,meson8b-reset.h
aspeed,ast2700-scu.h dt-bindings: mfd: aspeed: Support for AST2700 2024-11-01 16:11:50 +00:00
axg-aoclkc.h
bcm6318-reset.h
bcm6328-reset.h
bcm6358-reset.h
bcm6362-reset.h
bcm6368-reset.h
bcm63268-reset.h
bitmain,bm1880-reset.h
bt1-ccu.h
cortina,gemini-reset.h
delta,tn48m-reset.h
g12a-aoclkc.h
gxbb-aoclkc.h
hisi,hi6220-resets.h
imx7-reset.h
imx8mp-reset.h
imx8mq-reset.h
imx8ulp-pcc-reset.h
k210-rst.h
mediatek,mt6735-infracfg.h dt-bindings: clock: Add MediaTek MT6735 clock and reset bindings 2024-10-17 12:24:35 -07:00
mediatek,mt6735-mfgcfg.h dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers 2024-11-14 12:52:14 -08:00
mediatek,mt6735-pericfg.h dt-bindings: clock: Add MediaTek MT6735 clock and reset bindings 2024-10-17 12:24:35 -07:00
mediatek,mt6735-vdecsys.h dt-bindings: clock: mediatek: Add bindings for MT6735 syscon clock and reset controllers 2024-11-14 12:52:14 -08:00
mediatek,mt6735-wdt.h
mediatek,mt6795-resets.h
mediatek,mt7988-resets.h
mt2701-resets.h
mt2712-resets.h
mt7621-reset.h
mt7622-reset.h
mt7629-resets.h
mt7986-resets.h
mt8135-resets.h
mt8173-resets.h
mt8183-resets.h
mt8186-resets.h
mt8188-resets.h
mt8192-resets.h
mt8195-resets.h
nuvoton,ma35d1-reset.h
nuvoton,npcm7xx-reset.h
oxsemi,ox810se.h
oxsemi,ox820.h
pistachio-resets.h
qcom,gcc-apq8084.h
qcom,gcc-ipq806x.h
qcom,gcc-ipq5018.h
qcom,gcc-ipq6018.h
qcom,gcc-mdm9615.h
qcom,gcc-msm8660.h
qcom,gcc-msm8916.h
qcom,gcc-msm8939.h
qcom,gcc-msm8960.h
qcom,gcc-msm8974.h
qcom,ipq5424-gcc.h dt-bindings: clock: Add Qualcomm IPQ5424 GCC binding 2024-11-05 16:32:44 -08:00
qcom,ipq9574-gcc.h
qcom,mmcc-apq8084.h
qcom,mmcc-msm8960.h
qcom,mmcc-msm8974.h
qcom,qca8k-nsscc.h
qcom,sar2130p-gpucc.h dt-bindings: clk: qcom,sm8450-gpucc: add SAR2130P compatibles 2024-11-05 16:21:11 -08:00
qcom,sdm845-aoss.h
qcom,sdm845-pdc.h
qcom,sm8350-videocc.h
qcom,sm8450-gpucc.h
qcom,sm8650-gpucc.h
qcom,x1e80100-gpucc.h
raspberrypi,firmware-reset.h
realtek,rtd1195.h
realtek,rtd1295.h
rockchip,rk3576-cru.h dt-bindings: clock, reset: fix top-comment indentation rk3576 headers 2024-09-09 16:13:05 -07:00
rockchip,rk3588-cru.h
sama7g5-reset.h
snps,hsdk-reset.h
sophgo,sg2042-reset.h
st,stm32mp25-rcc.h
starfive,jh7110-crg.h
starfive-jh7100.h
stericsson,db8500-prcc-reset.h
stih407-resets.h
stm32mp1-resets.h
stm32mp13-resets.h
sun4i-a10-ccu.h
sun5i-ccu.h
sun6i-a31-ccu.h
sun8i-a23-a33-ccu.h
sun8i-a83t-ccu.h
sun8i-de2.h
sun8i-h3-ccu.h
sun8i-r-ccu.h
sun8i-r40-ccu.h
sun8i-v3s-ccu.h
sun9i-a80-ccu.h
sun9i-a80-de.h
sun9i-a80-usb.h
sun20i-d1-ccu.h
sun20i-d1-r-ccu.h
sun50i-a64-ccu.h
sun50i-a100-ccu.h
sun50i-a100-r-ccu.h
sun50i-h6-ccu.h
sun50i-h6-r-ccu.h
sun50i-h616-ccu.h dt-bindings: clock: sun50i-h616-ccu: Add GPADC clocks 2024-06-22 20:06:26 +08:00
suniv-ccu-f1c100s.h
sunplus,sp7021-reset.h
tegra124-car.h
tegra186-reset.h
tegra194-reset.h
tegra210-car.h
tegra234-reset.h
ti-syscon.h
toshiba,tmpv770x.h
xlnx-versal-resets.h
xlnx-zynqmp-resets.h