Maciej W. Rozycki 6ddcba9d48 MIPS: Sanitise Cavium switch cases in TLB handler synthesizers ... It makes no sense to fall through to `break'. Therefore reorder the switch statements so as to have the Cavium cases first, followed by the default case, which improves readability and pacifies code analysis tools. No change in semantics, assembly produced is exactly the same. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Maciej W. Rozycki <macro@orcam.me.uk> Fixes: bc431d2153 ("MIPS: Fix fall-through warnings for Clang") Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>		2022-03-07 13:11:03 +01:00
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c-octeon.c	MIPS: remove asm/war.h	2022-02-22 09:35:49 +01:00
c-r3k.c
c-r4k.c	MIPS: remove asm/war.h	2022-02-22 09:35:49 +01:00
cache.c	MIPS: Remove TX39XX support	2022-03-01 10:07:22 +01:00
cerr-sb1.c
cex-gen.S
cex-oct.S
cex-sb1.S
context.c
dma-noncoherent.c
extable.c
fault.c	mm: remove redundant check about FAULT_FLAG_ALLOW_RETRY bit	2022-01-15 16:30:27 +02:00
highmem.c
hugetlbpage.c
init.c	mm: percpu: add generic pcpu_fc_alloc/free funciton	2022-01-20 08:52:52 +02:00
ioremap.c
ioremap64.c
maccess.c
Makefile	MIPS: Remove TX39XX support	2022-03-01 10:07:22 +01:00
mmap.c
page-funcs.S
page.c	MIPS: remove asm/war.h	2022-02-22 09:35:49 +01:00
pgtable-32.c
pgtable-64.c
pgtable.c
physaddr.c
sc-debugfs.c
sc-ip22.c
sc-mips.c
sc-r5k.c
sc-rm7k.c
tlb-funcs.S
tlb-r3k.c	MIPS: Remove TX39XX support	2022-03-01 10:07:22 +01:00
tlb-r4k.c
tlbex-fault.S
tlbex.c	MIPS: Sanitise Cavium switch cases in TLB handler synthesizers	2022-03-07 13:11:03 +01:00
uasm-micromips.c
uasm-mips.c
uasm.c