Manu Gautam c88520db18 phy: qcom-qusb2: Fix HSTX_TRIM tuning with fused value for SDM845 ... Tune1 register on sdm845 is used to update HSTX_TRIM with fused setting. Enable same by specifying update_tune1_with_efuse flag for sdm845, otherwise driver ends up programming tune2 register. Fixes: ef17f6e212 ("phy: qcom-qusb2: Add QUSB2 PHYs support for sdm845") Signed-off-by: Manu Gautam <mgautam@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Acked-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>		2018-11-21 13:13:58 +05:30
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allwinner
amlogic
broadcom
cadence
hisilicon
lantiq
marvell
mediatek
motorola
mscc
qualcomm	phy: qcom-qusb2: Fix HSTX_TRIM tuning with fused value for SDM845	2018-11-21 13:13:58 +05:30
ralink
renesas
rockchip
samsung
socionext	phy: uniphier-pcie: Depend on HAS_IOMEM	2018-11-12 16:19:06 +05:30
st
tegra
ti
Kconfig
Makefile
phy-core.c
phy-lpc18xx-usb-otg.c
phy-pistachio-usb.c
phy-xgene.c