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a45af6d3a9
This commit updates the CP110 system controller driver to add the definition for a missing clock. The SDIO clock is dedicated driving the SDHCI interface and its frequency is 400MHz (2/5 of PLL source clock). The SDIO interface should be bound to this clock and not the core clock as in the older code. Using the wrong clock lead to a maximum SDHCI frequency of 250 Mhz, while the HW really supports up to 400 Mhz. This patch also fixes the NAND clock relationship documentation. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> [gregory.clement@free-electrons.com: - use sdio instead of emmc to name the clock] Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> |
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| firmware | ||
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| README | ||
Linux kernel ============ This file was moved to Documentation/admin-guide/README.rst Please notice that there are several guides for kernel developers and users. These guides can be rendered in a number of formats, like HTML and PDF. In order to build the documentation, use ``make htmldocs`` or ``make pdfdocs``. There are various text files in the Documentation/ subdirectory, several of them using the Restructured Text markup notation. See Documentation/00-INDEX for a list of what is contained in each file. Please read the Documentation/process/changes.rst file, as it contains the requirements for building and running the kernel, and information about the problems which may result by upgrading your kernel.