Peter Colberg bb1dbeceb1 fpga: dfl-pci: add PCI subdevice ID for Intel D5005 card ... Add PCI subdevice ID for the Intel D5005 Stratix 10 FPGA card as used with the Open FPGA Stack (OFS) FPGA Interface Manager (FIM). Unlike the Intel D5005 PAC FIM which exposed a separate PCI device ID, the OFS FIM reuses the same device ID for all DFL-based FPGA cards and differentiates on the subdevice ID. The subdevice ID values were chosen as the numeric part of the FPGA card names in hexadecimal. Signed-off-by: Peter Colberg <peter.colberg@intel.com> Reviewed-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Acked-by: Xu Yilun <yilun.xu@intel.com> Link: https://lore.kernel.org/r/20240422230257.1959-1-peter.colberg@intel.com Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>		2024-04-26 12:14:28 +08:00
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tests
altera-cvp.c
altera-fpga2sdram.c
altera-freeze-bridge.c
altera-hps2fpga.c
altera-pr-ip-core-plat.c
altera-pr-ip-core.c
altera-ps-spi.c
dfl-afu-dma-region.c
dfl-afu-error.c
dfl-afu-main.c
dfl-afu-region.c
dfl-afu.h
dfl-fme-br.c
dfl-fme-error.c
dfl-fme-main.c
dfl-fme-mgr.c
dfl-fme-perf.c
dfl-fme-pr.c
dfl-fme-pr.h
dfl-fme-region.c
dfl-fme.h
dfl-n3000-nios.c
dfl-pci.c	fpga: dfl-pci: add PCI subdevice ID for Intel D5005 card	2024-04-26 12:14:28 +08:00
dfl.c	fpga: dfl: make dfl_bus_type const	2024-02-18 18:07:05 +08:00
dfl.h
fpga-bridge.c	fpga: remove redundant checks for bridge ops	2024-02-18 18:07:06 +08:00
fpga-mgr.c
fpga-region.c
ice40-spi.c
intel-m10-bmc-sec-update.c
Kconfig
lattice-sysconfig-spi.c
lattice-sysconfig.c
lattice-sysconfig.h
machxo2-spi.c
Makefile
microchip-spi.c
of-fpga-region.c
socfpga-a10.c
socfpga.c
stratix10-soc.c
ts73xx-fpga.c
versal-fpga.c
xilinx-pr-decoupler.c
xilinx-spi.c
zynq-fpga.c
zynqmp-fpga.c