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Code Activity
linux/drivers/cxl
History
Alison Schofield da6aafec3d cxl/acpi: Add the Host Bridge base address to CXL port objects 
The base address for the Host Bridge port component registers is located
in the CXL Host Bridge Structure (CHBS) of the ACPI CXL Early Discovery
Table (CEDT). Retrieve the CHBS for each Host Bridge (ACPI0016 device)
and include that base address in the port object.

Co-developed-by: Vishal Verma <vishal.l.verma@intel.com>
Signed-off-by: Vishal Verma <vishal.l.verma@intel.com>
Signed-off-by: Alison Schofield <alison.schofield@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Ben Widawsky <ben.widawsky@intel.com>
Link: https://lore.kernel.org/r/a475ce137b899bc7ae5ba9550b5f198cb29ccbfd.1623968958.git.alison.schofield@intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2021-06-17 17:35:43 -07:00
..
acpi.c cxl/acpi: Add the Host Bridge base address to CXL port objects 2021-06-17 17:35:43 -07:00
core.c cxl/pmem: Register 'pmem' / cxl_nvdimm devices 2021-06-15 16:47:34 -07:00
cxl.h cxl/pmem: Register 'pmem' / cxl_nvdimm devices 2021-06-15 16:47:34 -07:00
Kconfig cxl/pmem: Add initial infrastructure for pmem support 2021-06-15 16:47:14 -07:00
Makefile cxl/pmem: Add initial infrastructure for pmem support 2021-06-15 16:47:14 -07:00
mem.h cxl/pmem: Register 'pmem' / cxl_nvdimm devices 2021-06-15 16:47:34 -07:00
pci.c cxl/pmem: Register 'pmem' / cxl_nvdimm devices 2021-06-15 16:47:34 -07:00
pci.h
pmem.c cxl/pmem: Register 'pmem' / cxl_nvdimm devices 2021-06-15 16:47:34 -07:00