Kernel: Renable UHCIController on 64-bit processors

This commit is contained in:
Hendiadyoin1 2021-03-07 14:32:34 +01:00 committed by Andreas Kling
parent 7ba3c22931
commit 0b04363b01
4 changed files with 31 additions and 41 deletions

View file

@ -27,18 +27,15 @@
#include <AK/Platform.h>
// FIXME: This should not be i386-specific.
#if ARCH(I386)
#include <Kernel/Debug.h>
#include <Kernel/Devices/USB/UHCIController.h>
#include <Kernel/Process.h>
#include <Kernel/StdLib.h>
#include <Kernel/Time/TimeManagement.h>
#include <Kernel/VM/AnonymousVMObject.h>
#include <Kernel/VM/MemoryManager.h>
# include <Kernel/Debug.h>
# include <Kernel/Devices/USB/UHCIController.h>
# include <Kernel/Process.h>
# include <Kernel/StdLib.h>
# include <Kernel/Time/TimeManagement.h>
# include <Kernel/VM/AnonymousVMObject.h>
# include <Kernel/VM/MemoryManager.h>
# define UHCI_ENABLED 1
#define UHCI_ENABLED 1
static constexpr u8 MAXIMUM_NUMBER_OF_TDS = 128; // Upper pool limit. This consumes the second page we have allocated
static constexpr u8 MAXIMUM_NUMBER_OF_QHS = 64;
@ -93,9 +90,9 @@ UHCIController& UHCIController::the()
UNMAP_AFTER_INIT void UHCIController::detect()
{
# if !UHCI_ENABLED
#if !UHCI_ENABLED
return;
# endif
#endif
PCI::enumerate([&](const PCI::Address& address, PCI::ID id) {
if (address.is_null())
return;
@ -200,9 +197,9 @@ UNMAP_AFTER_INIT void UHCIController::create_structures()
transfer_descriptor->set_isochronous();
transfer_descriptor->link_queue_head(m_interrupt_transfer_queue->paddr());
# if UHCI_VERBOSE_DEBUG
#if UHCI_VERBOSE_DEBUG
transfer_descriptor->print();
# endif
#endif
}
m_free_td_pool.resize(MAXIMUM_NUMBER_OF_TDS);
@ -216,10 +213,10 @@ UNMAP_AFTER_INIT void UHCIController::create_structures()
// access the raw descriptor (that we later send to the controller)
m_free_td_pool.at(i) = new (placement_addr) Kernel::USB::TransferDescriptor(paddr);
# if UHCI_VERBOSE_DEBUG
#if UHCI_VERBOSE_DEBUG
auto transfer_descriptor = m_free_td_pool.at(i);
transfer_descriptor->print();
# endif
#endif
}
if constexpr (UHCI_DEBUG) {
@ -464,5 +461,3 @@ void UHCIController::handle_irq(const RegisterState&)
}
}
#endif

View file

@ -29,16 +29,13 @@
#include <AK/Platform.h>
// FIXME: This should not be i386-specific.
#if ARCH(I386)
# include <AK/NonnullOwnPtr.h>
# include <Kernel/Devices/USB/UHCIDescriptorTypes.h>
# include <Kernel/IO.h>
# include <Kernel/PCI/Device.h>
# include <Kernel/Process.h>
# include <Kernel/Time/TimeManagement.h>
# include <Kernel/VM/ContiguousVMObject.h>
#include <AK/NonnullOwnPtr.h>
#include <Kernel/Devices/USB/UHCIDescriptorTypes.h>
#include <Kernel/IO.h>
#include <Kernel/PCI/Device.h>
#include <Kernel/Process.h>
#include <Kernel/Time/TimeManagement.h>
#include <Kernel/VM/ContiguousVMObject.h>
namespace Kernel::USB {
@ -105,4 +102,3 @@ private:
};
}
#endif

View file

@ -27,6 +27,7 @@
#pragma once
#include <AK/OwnPtr.h>
#include <AK/Ptr32.h>
#include <AK/Types.h>
namespace Kernel::USB {
@ -183,10 +184,10 @@ private:
u32 m_buffer_ptr; // Points to a data buffer for this transaction (i.e what we want to send or recv)
// These values will be ignored by the controller, but we can use them for configuration/bookkeeping
u32 m_paddr; // Physical address where this TransferDescriptor is located
TransferDescriptor* m_next_td; // Pointer to first TD
TransferDescriptor* m_prev_td; // Pointer to first TD
bool m_in_use; // Has this TD been allocated (and therefore in use)?
u32 m_paddr; // Physical address where this TransferDescriptor is located
Ptr32<TransferDescriptor> m_next_td { nullptr }; // Pointer to first TD
Ptr32<TransferDescriptor> m_prev_td { nullptr }; // Pointer to first TD
bool m_in_use; // Has this TD been allocated (and therefore in use)?
};
static_assert(sizeof(TransferDescriptor) == 32); // Transfer Descriptor is always 8 Dwords
@ -273,11 +274,11 @@ private:
// These values will be ignored by the controller, but we can use them for configuration/bookkeeping
// Any addresses besides `paddr` are assumed virtual and can be dereferenced
u32 m_paddr { 0 }; // Physical address where this QueueHead is located
QueueHead* m_next_qh { nullptr }; // Next QH
QueueHead* m_prev_qh { nullptr }; // Previous QH
TransferDescriptor* m_first_td { nullptr }; // Pointer to first TD
bool m_in_use { false }; // Is this QH currently in use?
u32 m_paddr { 0 }; // Physical address where this QueueHead is located
Ptr32<QueueHead> m_next_qh { nullptr }; // Next QH
Ptr32<QueueHead> m_prev_qh { nullptr }; // Previous QH
Ptr32<TransferDescriptor> m_first_td { nullptr }; // Pointer to first TD
bool m_in_use { false }; // Is this QH currently in use?
};
static_assert(sizeof(QueueHead) == 32); // Queue Head is always 8 Dwords

View file

@ -274,9 +274,7 @@ void init_stage2(void*)
}
// FIXME: This should not be i386-specific.
#if ARCH(I386)
USB::UHCIController::detect();
#endif
DMIExpose::initialize();