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Kernel: Renable UHCIController on 64-bit processors
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7ba3c22931
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0b04363b01
4 changed files with 31 additions and 41 deletions
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@ -27,18 +27,15 @@
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#include <AK/Platform.h>
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// FIXME: This should not be i386-specific.
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#if ARCH(I386)
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#include <Kernel/Debug.h>
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#include <Kernel/Devices/USB/UHCIController.h>
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#include <Kernel/Process.h>
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#include <Kernel/StdLib.h>
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#include <Kernel/Time/TimeManagement.h>
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#include <Kernel/VM/AnonymousVMObject.h>
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#include <Kernel/VM/MemoryManager.h>
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# include <Kernel/Debug.h>
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# include <Kernel/Devices/USB/UHCIController.h>
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# include <Kernel/Process.h>
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# include <Kernel/StdLib.h>
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# include <Kernel/Time/TimeManagement.h>
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# include <Kernel/VM/AnonymousVMObject.h>
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# include <Kernel/VM/MemoryManager.h>
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# define UHCI_ENABLED 1
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#define UHCI_ENABLED 1
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static constexpr u8 MAXIMUM_NUMBER_OF_TDS = 128; // Upper pool limit. This consumes the second page we have allocated
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static constexpr u8 MAXIMUM_NUMBER_OF_QHS = 64;
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@ -93,9 +90,9 @@ UHCIController& UHCIController::the()
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UNMAP_AFTER_INIT void UHCIController::detect()
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{
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# if !UHCI_ENABLED
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#if !UHCI_ENABLED
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return;
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# endif
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#endif
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PCI::enumerate([&](const PCI::Address& address, PCI::ID id) {
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if (address.is_null())
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return;
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@ -200,9 +197,9 @@ UNMAP_AFTER_INIT void UHCIController::create_structures()
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transfer_descriptor->set_isochronous();
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transfer_descriptor->link_queue_head(m_interrupt_transfer_queue->paddr());
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# if UHCI_VERBOSE_DEBUG
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#if UHCI_VERBOSE_DEBUG
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transfer_descriptor->print();
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# endif
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#endif
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}
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m_free_td_pool.resize(MAXIMUM_NUMBER_OF_TDS);
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@ -216,10 +213,10 @@ UNMAP_AFTER_INIT void UHCIController::create_structures()
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// access the raw descriptor (that we later send to the controller)
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m_free_td_pool.at(i) = new (placement_addr) Kernel::USB::TransferDescriptor(paddr);
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# if UHCI_VERBOSE_DEBUG
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#if UHCI_VERBOSE_DEBUG
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auto transfer_descriptor = m_free_td_pool.at(i);
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transfer_descriptor->print();
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# endif
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#endif
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}
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if constexpr (UHCI_DEBUG) {
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@ -464,5 +461,3 @@ void UHCIController::handle_irq(const RegisterState&)
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}
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}
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#endif
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@ -29,16 +29,13 @@
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#include <AK/Platform.h>
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// FIXME: This should not be i386-specific.
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#if ARCH(I386)
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# include <AK/NonnullOwnPtr.h>
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# include <Kernel/Devices/USB/UHCIDescriptorTypes.h>
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# include <Kernel/IO.h>
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# include <Kernel/PCI/Device.h>
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# include <Kernel/Process.h>
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# include <Kernel/Time/TimeManagement.h>
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# include <Kernel/VM/ContiguousVMObject.h>
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#include <AK/NonnullOwnPtr.h>
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#include <Kernel/Devices/USB/UHCIDescriptorTypes.h>
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#include <Kernel/IO.h>
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#include <Kernel/PCI/Device.h>
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#include <Kernel/Process.h>
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#include <Kernel/Time/TimeManagement.h>
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#include <Kernel/VM/ContiguousVMObject.h>
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namespace Kernel::USB {
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@ -105,4 +102,3 @@ private:
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};
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}
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#endif
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@ -27,6 +27,7 @@
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#pragma once
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#include <AK/OwnPtr.h>
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#include <AK/Ptr32.h>
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#include <AK/Types.h>
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namespace Kernel::USB {
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@ -183,10 +184,10 @@ private:
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u32 m_buffer_ptr; // Points to a data buffer for this transaction (i.e what we want to send or recv)
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// These values will be ignored by the controller, but we can use them for configuration/bookkeeping
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u32 m_paddr; // Physical address where this TransferDescriptor is located
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TransferDescriptor* m_next_td; // Pointer to first TD
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TransferDescriptor* m_prev_td; // Pointer to first TD
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bool m_in_use; // Has this TD been allocated (and therefore in use)?
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u32 m_paddr; // Physical address where this TransferDescriptor is located
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Ptr32<TransferDescriptor> m_next_td { nullptr }; // Pointer to first TD
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Ptr32<TransferDescriptor> m_prev_td { nullptr }; // Pointer to first TD
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bool m_in_use; // Has this TD been allocated (and therefore in use)?
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};
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static_assert(sizeof(TransferDescriptor) == 32); // Transfer Descriptor is always 8 Dwords
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@ -273,11 +274,11 @@ private:
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// These values will be ignored by the controller, but we can use them for configuration/bookkeeping
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// Any addresses besides `paddr` are assumed virtual and can be dereferenced
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u32 m_paddr { 0 }; // Physical address where this QueueHead is located
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QueueHead* m_next_qh { nullptr }; // Next QH
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QueueHead* m_prev_qh { nullptr }; // Previous QH
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TransferDescriptor* m_first_td { nullptr }; // Pointer to first TD
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bool m_in_use { false }; // Is this QH currently in use?
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u32 m_paddr { 0 }; // Physical address where this QueueHead is located
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Ptr32<QueueHead> m_next_qh { nullptr }; // Next QH
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Ptr32<QueueHead> m_prev_qh { nullptr }; // Previous QH
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Ptr32<TransferDescriptor> m_first_td { nullptr }; // Pointer to first TD
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bool m_in_use { false }; // Is this QH currently in use?
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};
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static_assert(sizeof(QueueHead) == 32); // Queue Head is always 8 Dwords
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@ -274,9 +274,7 @@ void init_stage2(void*)
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}
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// FIXME: This should not be i386-specific.
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#if ARCH(I386)
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USB::UHCIController::detect();
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#endif
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DMIExpose::initialize();
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