mirror of
https://github.com/SerenityOS/serenity.git
synced 2025-01-23 18:02:05 -05:00
Kernel: Map PCI devices only once during boot
Instead of mapping a 4KB region to access device configuration space each time we call one of the PCI helpers, just map them once during the boot process. Then, if we request to access one of those devices, we can ask the PCI subsystem to give us the virtual address where the device's configuration space is mapped.
This commit is contained in:
parent
0aeef47abd
commit
6131048a5f
4 changed files with 95 additions and 60 deletions
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@ -24,6 +24,7 @@
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <Kernel/IO.h>
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#include <Kernel/PCI/Access.h>
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#include <Kernel/PCI/IOAccess.h>
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@ -57,18 +58,36 @@ Access::Access()
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s_access = this;
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}
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static u16 read_type(Address address)
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u8 Access::early_read8_field(Address address, u32 field)
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{
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return (read8(address, PCI_CLASS) << 8u) | read8(address, PCI_SUBCLASS);
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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return IO::in8(PCI_VALUE_PORT + (field & 3));
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}
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u16 Access::early_read16_field(Address address, u32 field)
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{
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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return IO::in16(PCI_VALUE_PORT + (field & 2));
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}
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u32 Access::early_read32_field(Address address, u32 field)
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{
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IO::out32(PCI_ADDRESS_PORT, address.io_address_for_field(field));
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return IO::in32(PCI_VALUE_PORT);
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}
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u16 Access::early_read_type(Address address)
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{
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return (early_read8_field(address, PCI_CLASS) << 8u) | early_read8_field(address, PCI_SUBCLASS);
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}
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void Access::enumerate_functions(int type, u8 bus, u8 slot, u8 function, Function<void(Address, ID)>& callback)
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{
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Address address(0, bus, slot, function);
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if (type == -1 || type == read_type(address))
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callback(address, { read16_field(address, PCI_VENDOR_ID), read16_field(address, PCI_DEVICE_ID) });
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if (read_type(address) == PCI_TYPE_BRIDGE) {
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u8 secondary_bus = read8_field(address, PCI_SECONDARY_BUS);
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if (type == -1 || type == early_read_type(address))
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callback(address, { early_read16_field(address, PCI_VENDOR_ID), early_read16_field(address, PCI_DEVICE_ID) });
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if (early_read_type(address) == PCI_TYPE_BRIDGE) {
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u8 secondary_bus = early_read8_field(address, PCI_SECONDARY_BUS);
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#ifdef PCI_DEBUG
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klog() << "PCI: Found secondary bus: " << secondary_bus;
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#endif
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@ -80,14 +99,14 @@ void Access::enumerate_functions(int type, u8 bus, u8 slot, u8 function, Functio
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void Access::enumerate_slot(int type, u8 bus, u8 slot, Function<void(Address, ID)>& callback)
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{
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Address address(0, bus, slot, 0);
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if (read16_field(address, PCI_VENDOR_ID) == PCI_NONE)
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if (early_read16_field(address, PCI_VENDOR_ID) == PCI_NONE)
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return;
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enumerate_functions(type, bus, slot, 0, callback);
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if (!(read8_field(address, PCI_HEADER_TYPE) & 0x80))
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if (!(early_read8_field(address, PCI_HEADER_TYPE) & 0x80))
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return;
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for (u8 function = 1; function < 8; ++function) {
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Address address(0, bus, slot, function);
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if (read16_field(address, PCI_VENDOR_ID) != PCI_NONE)
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if (early_read16_field(address, PCI_VENDOR_ID) != PCI_NONE)
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enumerate_functions(type, bus, slot, function, callback);
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}
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}
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@ -63,6 +63,11 @@ public:
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protected:
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virtual void enumerate_hardware(Function<void(Address, ID)>) = 0;
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u8 early_read8_field(Address address, u32 field);
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u16 early_read16_field(Address address, u32 field);
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u32 early_read32_field(Address address, u32 field);
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u16 early_read_type(Address address);
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Access();
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Vector<PhysicalID> m_physical_ids;
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};
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@ -35,10 +35,10 @@ namespace PCI {
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class MMIOSegment {
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public:
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MMIOSegment(PhysicalAddress, u8, u8);
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u8 get_start_bus();
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u8 get_end_bus();
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size_t get_size();
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PhysicalAddress get_paddr();
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u8 get_start_bus() const;
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u8 get_end_bus() const;
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size_t get_size() const;
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PhysicalAddress get_paddr() const;
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private:
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PhysicalAddress m_base_addr;
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@ -48,6 +48,17 @@ private:
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#define PCI_MMIO_CONFIG_SPACE_SIZE 4096
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DeviceConfigurationSpaceMapping::DeviceConfigurationSpaceMapping(Address device_address, const MMIOSegment& mmio_segment)
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: m_device_address(device_address)
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, m_mapped_region(MM.allocate_kernel_region(PAGE_ROUND_UP(PCI_MMIO_CONFIG_SPACE_SIZE), "PCI MMIO Device Access", Region::Access::Read | Region::Access::Write).release_nonnull())
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{
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PhysicalAddress segment_lower_addr = mmio_segment.get_paddr();
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PhysicalAddress device_physical_mmio_space = segment_lower_addr.offset(
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PCI_MMIO_CONFIG_SPACE_SIZE * m_device_address.function() + (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE) * m_device_address.slot() + (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE * PCI_MAX_DEVICES_PER_BUS) * (m_device_address.bus() - mmio_segment.get_start_bus()));
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m_mapped_region->physical_page_slot(0) = PhysicalPage::create(device_physical_mmio_space, false, false);
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m_mapped_region->remap();
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}
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uint32_t MMIOAccess::segment_count() const
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{
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return m_segments.size();
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@ -75,10 +86,8 @@ void MMIOAccess::initialize(PhysicalAddress mcfg)
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MMIOAccess::MMIOAccess(PhysicalAddress p_mcfg)
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: m_mcfg(p_mcfg)
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, m_mapped_address(ChangeableAddress(0xFFFF, 0xFF, 0xFF, 0xFF))
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{
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klog() << "PCI: Using MMIO for PCI configuration space access";
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m_mmio_window_region = MM.allocate_kernel_region(PAGE_ROUND_UP(PCI_MMIO_CONFIG_SPACE_SIZE), "PCI MMIO", Region::Access::Read | Region::Access::Write);
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auto checkup_region = MM.allocate_kernel_region(p_mcfg.page_base(), (PAGE_SIZE * 2), "PCI MCFG Checkup", Region::Access::Read | Region::Access::Write);
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#ifdef PCI_DEBUG
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@ -112,38 +121,34 @@ MMIOAccess::MMIOAccess(PhysicalAddress p_mcfg)
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InterruptDisabler disabler;
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#ifdef PCI_DEBUG
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dbg() << "PCI: mapped address (" << String::format("%w", m_mapped_address.seg()) << ":" << String::format("%b", m_mapped_address.bus()) << ":" << String::format("%b", m_mapped_address.slot()) << "." << String::format("%b", m_mapped_address.function()) << ")";
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#endif
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map_device(Address(0, 0, 0, 0));
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#ifdef PCI_DEBUG
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dbg() << "PCI: Default mapped address (" << String::format("%w", m_mapped_address.seg()) << ":" << String::format("%b", m_mapped_address.bus()) << ":" << String::format("%b", m_mapped_address.slot()) << "." << String::format("%b", m_mapped_address.function()) << ")";
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#endif
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enumerate_hardware([&](const Address& address, ID id) {
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m_physical_ids.append({ address, id });
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m_mapped_device_regions.append(make<DeviceConfigurationSpaceMapping>(address, m_segments.get(address.seg()).value()));
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#ifdef PCI_DEBUG
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dbg() << "PCI: Mapping device @ pci (" << String::format("%w", address.seg()) << ":" << String::format("%b", address.bus()) << ":" << String::format("%b", address.slot()) << "." << String::format("%b", address.function()) << ")"
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<< " " << m_mapped_device_regions.last().vaddr() << " " << m_mapped_device_regions.last().paddr();
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#endif
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});
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}
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void MMIOAccess::map_device(Address address)
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Optional<VirtualAddress> MMIOAccess::get_device_configuration_space(Address address)
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{
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if (m_mapped_address == address)
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return;
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// FIXME: Map and put some lock!
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ASSERT_INTERRUPTS_DISABLED();
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auto segment = m_segments.get(address.seg());
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ASSERT(segment.has_value());
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PhysicalAddress segment_lower_addr = segment.value().get_paddr();
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PhysicalAddress device_physical_mmio_space = segment_lower_addr.offset(
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PCI_MMIO_CONFIG_SPACE_SIZE * address.function() + (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE) * address.slot() + (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE * PCI_MAX_DEVICES_PER_BUS) * (address.bus() - segment.value().get_start_bus()));
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for (auto& mapping : m_mapped_device_regions) {
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auto checked_address = mapping.address();
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#ifdef PCI_DEBUG
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dbg() << "PCI: Mapping device @ pci (" << String::format("%w", address.seg()) << ":" << String::format("%b", address.bus()) << ":" << String::format("%b", address.slot()) << "." << String::format("%b", address.function()) << ")"
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<< " V 0x" << String::format("%x", m_mmio_window_region->vaddr().get()) << " P 0x" << String::format("%x", device_physical_mmio_space.get());
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dbg() << "PCI Device Configuration Space Mapping: Check if " << checked_address << " was requested";
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#endif
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m_mmio_window_region->physical_page_slot(0) = PhysicalPage::create(device_physical_mmio_space, false, false);
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m_mmio_window_region->remap();
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m_mapped_address = address;
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if (address.seg() == checked_address.seg()
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&& address.bus() == checked_address.bus()
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&& address.slot() == checked_address.slot()
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&& address.function() == checked_address.function()) {
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#ifdef PCI_DEBUG
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dbg() << "PCI Device Configuration Space Mapping: Found " << checked_address;
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#endif
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return mapping.vaddr();
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}
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}
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return {};
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}
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u8 MMIOAccess::read8_field(Address address, u32 field)
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#ifdef PCI_DEBUG
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dbg() << "PCI: Reading field " << field << ", Address(" << String::format("%w", address.seg()) << ":" << String::format("%b", address.bus()) << ":" << String::format("%b", address.slot()) << "." << String::format("%b", address.function()) << ")";
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#endif
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map_device(address);
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return *((u8*)(m_mmio_window_region->vaddr().get() + (field & 0xfff)));
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return *((u8*)(get_device_configuration_space(address).value().get() + (field & 0xfff)));
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}
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u16 MMIOAccess::read16_field(Address address, u32 field)
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#ifdef PCI_DEBUG
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dbg() << "PCI: Reading field " << field << ", Address(" << String::format("%w", address.seg()) << ":" << String::format("%b", address.bus()) << ":" << String::format("%b", address.slot()) << "." << String::format("%b", address.function()) << ")";
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#endif
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map_device(address);
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return *((u16*)(m_mmio_window_region->vaddr().get() + (field & 0xfff)));
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return *((u16*)(get_device_configuration_space(address).value().get() + (field & 0xfff)));
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}
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u32 MMIOAccess::read32_field(Address address, u32 field)
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@ -175,8 +178,7 @@ u32 MMIOAccess::read32_field(Address address, u32 field)
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#ifdef PCI_DEBUG
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dbg() << "PCI: Reading field " << field << ", Address(" << String::format("%w", address.seg()) << ":" << String::format("%b", address.bus()) << ":" << String::format("%b", address.slot()) << "." << String::format("%b", address.function()) << ")";
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#endif
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map_device(address);
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return *((u32*)(m_mmio_window_region->vaddr().get() + (field & 0xfff)));
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return *((u32*)(get_device_configuration_space(address).value().get() + (field & 0xfff)));
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}
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void MMIOAccess::write8_field(Address address, u32 field, u8 value)
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#ifdef PCI_DEBUG
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dbg() << "PCI: Writing to field " << field << ", Address(" << String::format("%w", address.seg()) << ":" << String::format("%b", address.bus()) << ":" << String::format("%b", address.slot()) << "." << String::format("%b", address.function()) << ") value 0x" << String::format("%x", value);
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#endif
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map_device(address);
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*((u8*)(m_mmio_window_region->vaddr().get() + (field & 0xfff))) = value;
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*((u8*)(get_device_configuration_space(address).value().get() + (field & 0xfff))) = value;
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}
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void MMIOAccess::write16_field(Address address, u32 field, u16 value)
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{
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#ifdef PCI_DEBUG
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dbg() << "PCI: Writing to field " << field << ", Address(" << String::format("%w", address.seg()) << ":" << String::format("%b", address.bus()) << ":" << String::format("%b", address.slot()) << "." << String::format("%b", address.function()) << ") value 0x" << String::format("%x", value);
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#endif
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map_device(address);
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*((u16*)(m_mmio_window_region->vaddr().get() + (field & 0xfff))) = value;
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*((u16*)(get_device_configuration_space(address).value().get() + (field & 0xfff))) = value;
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}
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void MMIOAccess::write32_field(Address address, u32 field, u32 value)
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{
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@ -206,8 +206,7 @@ void MMIOAccess::write32_field(Address address, u32 field, u32 value)
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#ifdef PCI_DEBUG
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dbg() << "PCI: Writing to field " << field << ", Address(" << String::format("%w", address.seg()) << ":" << String::format("%b", address.bus()) << ":" << String::format("%b", address.slot()) << "." << String::format("%b", address.function()) << ") value 0x" << String::format("%x", value);
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#endif
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map_device(address);
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*((u32*)(m_mmio_window_region->vaddr().get() + (field & 0xfff))) = value;
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*((u32*)(get_device_configuration_space(address).value().get() + (field & 0xfff))) = value;
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}
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void MMIOAccess::enumerate_hardware(Function<void(Address, ID)> callback)
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dbg() << "PCI: Enumerating Memory mapped IO segment " << seg;
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#endif
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// Single PCI host controller.
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if ((read8_field(Address(seg), PCI_HEADER_TYPE) & 0x80) == 0) {
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if ((early_read8_field(Address(seg), PCI_HEADER_TYPE) & 0x80) == 0) {
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enumerate_bus(-1, 0, callback);
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return;
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}
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// Multiple PCI host controllers.
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for (u8 function = 0; function < 8; ++function) {
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if (read16_field(Address(seg, 0, 0, function), PCI_VENDOR_ID) == PCI_NONE)
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if (early_read16_field(Address(seg, 0, 0, function), PCI_VENDOR_ID) == PCI_NONE)
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break;
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enumerate_bus(-1, function, callback);
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}
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{
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}
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u8 MMIOSegment::get_start_bus()
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u8 MMIOSegment::get_start_bus() const
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{
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return m_start_bus;
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}
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u8 MMIOSegment::get_end_bus()
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u8 MMIOSegment::get_end_bus() const
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{
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return m_end_bus;
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}
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size_t MMIOSegment::get_size()
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size_t MMIOSegment::get_size() const
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{
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return (PCI_MMIO_CONFIG_SPACE_SIZE * PCI_MAX_FUNCTIONS_PER_DEVICE * PCI_MAX_DEVICES_PER_BUS * (get_end_bus() - get_start_bus()));
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}
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PhysicalAddress MMIOSegment::get_paddr()
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PhysicalAddress MMIOSegment::get_paddr() const
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{
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return m_base_addr;
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}
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@ -27,6 +27,7 @@
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#pragma once
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#include <AK/HashMap.h>
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#include <AK/NonnullOwnPtrVector.h>
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#include <AK/OwnPtr.h>
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#include <AK/Types.h>
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#include <Kernel/ACPI/Definitions.h>
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@ -39,6 +40,18 @@
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namespace Kernel {
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namespace PCI {
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class DeviceConfigurationSpaceMapping {
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public:
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DeviceConfigurationSpaceMapping(Address, const MMIOSegment&);
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VirtualAddress vaddr() const { return m_mapped_region->vaddr(); };
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PhysicalAddress paddr() const { return m_mapped_region->physical_page(0)->paddr(); }
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const Address& address() const { return m_device_address; };
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private:
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Address m_device_address;
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NonnullOwnPtr<Region> m_mapped_region;
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};
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class MMIOAccess final : public Access {
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public:
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static void initialize(PhysicalAddress mcfg);
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virtual u16 read16_field(Address address, u32) override;
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virtual u32 read32_field(Address address, u32) override;
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void map_device(Address address);
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Optional<VirtualAddress> get_device_configuration_space(Address address);
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virtual u8 segment_start_bus(u32) const override;
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virtual u8 segment_end_bus(u32) const override;
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PhysicalAddress m_mcfg;
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HashMap<u16, MMIOSegment> m_segments;
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OwnPtr<Region> m_mmio_window_region;
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ChangeableAddress m_mapped_address;
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NonnullOwnPtrVector<DeviceConfigurationSpaceMapping> m_mapped_device_regions;
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};
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}
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