Revert "Kernel/AHCI: Add a boot argument to force AHCI to operate on IRQ 11"

This reverts commit cfc2f33dcb.

We can't actually change the IRQ line value and expect the device
to work with it (this was my mistake).
That register is R/W so the firmware can figure out IRQ routing and put
the correct value and write it to the Interrupt line register.
This commit is contained in:
Liav A 2021-03-22 21:01:48 +02:00 committed by Andreas Kling
parent 84e34d76d8
commit b25f84daaa
3 changed files with 0 additions and 13 deletions

View file

@ -113,11 +113,6 @@ UNMAP_AFTER_INIT bool CommandLine::is_mmio_enabled() const
return lookup("pci_mmio").value_or("off") == "on";
}
UNMAP_AFTER_INIT bool CommandLine::is_forcing_irq_11_for_ahci() const
{
return lookup("force_ahci_irq_11").value_or("off") == "on";
}
UNMAP_AFTER_INIT bool CommandLine::is_legacy_time_enabled() const
{
return lookup("time").value_or("modern") == "legacy";

View file

@ -73,7 +73,6 @@ public:
[[nodiscard]] bool is_vmmouse_enabled() const;
[[nodiscard]] bool is_mmio_enabled() const;
[[nodiscard]] bool is_legacy_time_enabled() const;
[[nodiscard]] bool is_forcing_irq_11_for_ahci() const;
[[nodiscard]] bool is_text_mode() const;
[[nodiscard]] bool is_force_pio() const;
[[nodiscard]] AcpiFeatureLevel acpi_feature_level() const;

View file

@ -172,13 +172,6 @@ void AHCIController::initialize()
hba().control_regs.ghc = 0x80000000; // Ensure that HBA knows we are AHCI aware.
PCI::enable_interrupt_line(pci_address());
PCI::enable_bus_mastering(pci_address());
// FIXME: This is a hack for VMWare (and possibly other hardware) that set
// the IRQ line to 7 or other weird value. Find a better way to set this
// with balancing IRQ sharing in mind.
if (kernel_command_line().is_forcing_irq_11_for_ahci())
PCI::set_interrupt_line(pci_address(), 11);
enable_global_interrupts();
m_handlers.append(AHCIPortHandler::create(*this, PCI::get_interrupt_line(pci_address()),
AHCI::MaskedBitField((volatile u32&)(hba().control_regs.pi))));