Commit graph

8966 commits

Author SHA1 Message Date
RatcheT2497
62a25aa46d Kernel/RTL8168: Change wrong u32 mmio reads to u8
Crash caused by erroneous reading of a few 8bit registers as 32bit,
causing an unaligned access panic.
2025-01-15 21:32:54 -05:00
Sönke Holz
6127f03108 Kernel/GPU: Add a simple-framebuffer devicetree driver
simple-framebuffer nodes describe pre-initialized framebuffers that we
can use without any special setup code.
2025-01-14 00:16:43 +01:00
Sönke Holz
60bb8edd7b Kernel/xHCI: Support xHCI controllers defined in the devicetree 2025-01-13 19:30:54 +01:00
Sönke Holz
980bc4ddf0 Kernel/xHCI: Split PCI-specific code into a new subclass
This will allow us to add support for xHCI controllers that are not
connected via PCI.
2025-01-13 19:30:54 +01:00
Sönke Holz
e88594005b Kernel/DeviceTree: Ignore nodes with status != "okay"
status = "okay" means the device is operational. We should ignore
devices that have a different status property value.

The BCM2835TimerDriver force disable hack can be removed, since that
timer is disabled in the Pi 4 devicetree.

But we have to introduce another hack that force enables the Pi 3 system
timer, as we otherwise wouldn't have any timer that we support for the
Pi 3.
2025-01-13 19:30:54 +01:00
Sönke Holz
0d11e70cfe Kernel/MM: Set the correct memory type for mmap()s
Make the MemoryType used by mmap() configurable by
File::vmobject_and_memory_type_for_mmap overrides (previously called
vmobject_for_mmap).

All mmap()s were previously MemoryType::Normal.
2025-01-13 19:30:54 +01:00
Sönke Holz
b92907f339 Kernel/MM: Make allocate_region_with_vmobject MemoryType-aware 2025-01-13 19:30:54 +01:00
Sönke Holz
d73a8fe750 Kernel/MM: Synchronize executable memory after handling an inode fault
ARM requires an explicit cache flush when modifying executable memory:
https://community.arm.com/arm-community-blogs/b/architectures-and-processors-blog/posts/caches-and-self-modifying-code

__builtin___clear_cache compiles to a no-op if no explicit flushing is
needed (like on x86):
https://gcc.gnu.org/onlinedocs/gcc/Other-Builtins.html#index-_005f_005fbuiltin_005f_005f_005fclear_005fcache
2025-01-13 19:30:54 +01:00
Sönke Holz
1d29f02274 Kernel/SDHC: Return ENOTSUP if no base clock frequency provided
We would otherwise crash here on the Raspberry Pi 4.
2025-01-13 19:30:54 +01:00
Sönke Holz
6fa8165d91 Kernel/MM: Use same memory type for zeroing pages as the actual mapping
On some architectures like ARM, using mismatched memory types for
different aliases of the same physical memory can lead to unexpected
behavior.
(https://developer.arm.com/documentation/102376/0200/Memory-aliasing-and-mismatched-memory-types)

Flushing the data cache and using appropriate memory barriers might be
enough, but should have worse performance.
2025-01-13 19:30:54 +01:00
Sönke Holz
524f699ae2 Kernel+LibC: Clean up assembly code
Some assembly files were previously inconsistently formatted.

- Use 4 spaces for indentation
- Use `.L` as the local label prefix
- Remove trailing whitespace
2025-01-10 12:31:16 +01:00
Sönke Holz
1e0e569273 Kernel: Don't allow text relocations
We don't have any text relocations in the kernel anymore.
This linker argument was added in bd6dc5ccec as a temporary workaround.

Removing this argument won't cause text relocations to be reported for
aarch64 and riscv64, as we currently compile the kernel with `--no-pie`
on those architectures.
2025-01-10 12:31:16 +01:00
Sönke Holz
95ec8d7f78 Kernel/aarch64: Don't use the ldr Rd, =label pseudoinstruction
This pseudoinstruction causes text relocations, as it stores the target
address in literal pools inside .text.

The bss clearing code now also matches the RISC-V implementation.
2025-01-10 12:31:16 +01:00
Sönke Holz
cfa16b767c Kernel/riscv64: Avoid generation of a text relocation in enable_paging
Manually calculate the target address instead of storing the target
address in .text.
2025-01-10 12:31:16 +01:00
Sönke Holz
819c12c2f2 Kernel/PCI: Mark MSI-(X) as explicitly not supported on aarch64/riscv64 2024-12-30 12:56:52 +01:00
Sönke Holz
555d2ac5ef Kernel/aarch64: Don't print the register state twice for crashes
`handle_crash` already calls `dump_registers`, so there is no need for
the AArch64 exception handler to do it as well.

The second register dump (the one made by `handle_crash`) previously
also often reported an incorrect ESR_EL1 value, as interrupts are
enabled at that point in time.
This problem can simply be solved by saving the ESR_EL1 value in the
`RegisterState`, similar to how we save `scause` on RISC-V.
2024-12-24 01:12:26 +01:00
Sönke Holz
86bb060d4b Kernel/aarch64: Don't set SCTLR_EL1 to very permissive values initially
The initial value we used for SCLTR_EL1 would allow EL0 to do things it
shouldn't be allowed to, like disabling interrupts.

Setting that register to more permissive values and overriding it later
shouldn't cause any problems, but it's still less confusing this way.
2024-12-24 01:12:26 +01:00
Liav A.
1dfc9e2df3 Kernel+Userland: Add immutable mounts
Immutable mounts are mounts that can't be changed in any aspect, if the
VFSRootContext that hold them is used by a process. This includes two
operations on a mount:
1. Trying to remove the mount from the mount table.
2. Trying to change the flags of the mount.

The condition of a VFSRootContext being held by a process or not is
crucial, as the intention is to allow removal of mounts that marked as
immutable if the VFSRootContext is not being used anymore (for example,
if the container that was created with such context stopped).

Marking mounts as immutable on the first VFS root context essentially
ensures they will never be modified because there will be a process
using that context (which is the "main" VFS root context in the system
runtime).

It should be noted that setting a mount as immutable can be done in
creation time of the mount by passing the MS_IMMUTABLE flag, or by doing
a remount with MS_IMMUTABLE flag.
2024-12-23 20:38:38 +01:00
Sönke Holz
06c3528197 Kernel/aarch64: Implement Processor::read_cycle_count 2024-12-19 12:53:52 -05:00
Sönke Holz
51103b5f35 Kernel: Make Processor::read_cycle_count return an Optional<u64>
Not all processors provide a mechanism to read the cycle count.

Change the `EntropySource::add_random_event` function to fall back to
getting a timestamp from TimeManagement if no cycle count is available.
2024-12-19 12:53:52 -05:00
Sönke Holz
f50852117b Kernel: Rename Processor::{read_cpu_counter => read_cycle_count}
This name better reflects what this function actually does.
2024-12-19 12:53:52 -05:00
Sönke Holz
264a139e78 Kernel/aarch64: Set g_total_processors to a hard-coded value of 1
This value is used by the NVMe driver to determine the number of queues
to create.
2024-12-19 12:53:52 -05:00
Sönke Holz
aa4c286138 Kernel/aarch64: Make RPi::SDHostController a DeviceTree::Driver 2024-12-19 12:53:52 -05:00
Sönke Holz
cae52e39c2 Kernel/aarch64: Only attempt to initialize the MiniUART on Raspberry Pis 2024-12-19 12:53:52 -05:00
Sönke Holz
e447342550 Kernel/aarch64: Perform an ISB after setting TTBR*_EL1
Changes to ARM system registers are not guaranteed to be visible until
a context synchronization event, like performing an ISB.
2024-12-19 00:29:05 +01:00
Sönke Holz
1d3a255ea1 Kernel: Recognize a stack pointer pointing to the top of stack as valid
This also removes the explicit decrementing of the stack pointer in
`sys$create_thread` before passing it to `validate_user_stack`,
as it's unnecessary now.
2024-12-18 16:09:52 -05:00
implicitfield
8ed7225810 Kernel/VFS: Don't explicitly remove "." and ".." entries
No behavior change intended.
2024-12-17 19:02:15 -05:00
implicitfield
0e94887b2c Kernel/VFS: Make filesystem implementations responsible for renames
Previously, the VFS layer would try to handle renames more-or-less by
itself, which really only worked for ext2, and even that was only due to
the replace_child kludge existing specifically for this purpose. This
never worked properly for FATFS, since the VFS layer effectively
depended on filesystems having some kind of reference-counting for
inodes, which is something that simply doesn't exist on any FAT variant
we support.

To resolve various issues with the existing scheme, this commit makes
filesystem implementations themselves responsible for the actual rename
operation, while keeping all the existing validation inside the VFS
layer. The only intended behavior change here is that rename operations
should actually properly work on FATFS.
2024-12-17 19:02:15 -05:00
implicitfield
666ba3b970 Kernel/Ext2FS: Make to_ext2_file_type a static member of Ext2FSInode 2024-12-17 19:02:15 -05:00
implicitfield
8db6dd47c7 Kernel/FATFS: Allocate new entries properly in allocate_entries
There were two separate issues at play which made this work incorrectly.
The first was that the newly allocated block was incorrectly computed,
because it was assumed that the cached block list was updated when a new
cluster was allocated. The second issue was that there was an off-by-one
in the loop that collected the newly allocated entries, which meant that
the resulting list had an entry less than what was requested.
2024-12-17 19:02:15 -05:00
implicitfield
1a4036e8ed Kernel/FATFS: Don't shadow lfn_entries in add_child 2024-12-17 19:02:15 -05:00
implicitfield
c6e483d65e Kernel/FATFS: Make (an overload of) first_cluster actually freestanding
The old overload still depended on m_entry being initialized, which
meant that (due to where this method is used) all inodes ended up
getting the same index.
2024-12-17 19:02:15 -05:00
Sönke Holz
7bcf97c8e8 Kernel/aarch64: Implement microseconds_delay
This simple delay loop uses the EL1 virtual timer to wait for the given
amount of time.
2024-12-15 15:26:40 +01:00
Sönke Holz
6517eabb5f Kernel/aarch64: Rename AUX.{h,cpp} to AUXPeripherals.{h,cpp}
The file name "AUX" is reserved on Windows.
2024-12-15 02:06:23 +01:00
Sönke Holz
b88cd185a0 Kernel/aarch64: Use the EL1 virtual timer for ARMv8Timer
The physical timer might not be accessible to us if we are running in a
hypervisor.
2024-12-14 19:40:02 +01:00
Sönke Holz
4cc9bea86d Kernel/aarch64: Reject ARMv8Timers with the "interrupt-names" property
Our current check `interrupts.size() != 4` doesn't always work because
timers with the "interrupt-names" property can define 4 timers at the
same indices mapping to different interrupts.

The old devicetree binding only allowed 4 interrupts, so keep the old
check as well.
2024-12-14 19:40:02 +01:00
implicitfield
98f26fac1b Kernel/AHCI: Don't use [[gnu::packed]] on register structs
The AHCI specification accounts for common alignment rules, so we don't
actually need to pack these structs. In fact, packing some of these
structs actually causes misaligned accesses on aarch64.
2024-12-14 18:18:02 +01:00
implicitfield
b5491e58f1 Kernel/aarch64: Implement interrupt reservation 2024-12-14 18:18:02 +01:00
implicitfield
7fb4396cba Kernel/aarch64: Initialize interrupts during processor bringup 2024-12-14 18:18:02 +01:00
implicitfield
47114b11e8 Kernel/aarch64: Share the PCI initialization routine with RISC-V 2024-12-14 18:18:02 +01:00
Sönke Holz
056cba3c0c Kernel: Use MemoryType::IO for DMA regions everywhere
Drivers using DMA buffers are currently broken on bare metal since
d3a0ae5c57 and b3bae90e71 made DMA buffers use the NonCacheable memory
type.

We should investigate each of these drivers and and add proper fences
where needed.

The only place where MemoryType::IO definitely isn't needed is the xHCI
scratchpad regions, as they are only accessed by the device.
2024-12-12 16:07:25 +01:00
Sönke Holz
10c217070f Kernel/MM: Allow setting the memory type for DMA regions 2024-12-12 16:07:25 +01:00
Sönke Holz
0d6d716e94 Kernel/aarch64: Add ARMv8Timer support
This timer is used by the Raspberry Pi 3+4 and the QEMU virt machine.

Remove the `#if ARCH`s from HardwareTimerType, as all other enum values
would otherwise have to be updated to keep the values consistent across
all architectures.
2024-12-12 15:06:28 +01:00
Sönke Holz
ebe5b0df03 Kernel/aarch64: Add GICv2 support
GICs are used by many ARM systems, including the Pi 4+5 and the QEMU
virt machine.
2024-12-12 15:06:28 +01:00
Sönke Holz
27ff852387 Kernel/aarch64: Support more than 64 interrupts
GICv2s can have up to 1020 interrupts.

AArch64 IRQControllers previously returned a bit field of pending
interrupts. Change the API to return one pending interrupt at a time
instead.

We still truncate the interrupt number to 8 bit in a lot of other places
in the kernel. This is something that needs to be addressed in a future
commit.
2024-12-12 15:06:28 +01:00
Sönke Holz
f33f7f91de Kernel: Handle devicetree drivers with multiple compatible strings 2024-12-12 15:06:28 +01:00
Sönke Holz
300c132f47 Kernel/USB: Remove never-initialized USB::Device::m_{vendor,product}_id
These members were never set and are redundant because you can just read
them directly from the device descriptor.
2024-12-11 18:57:54 -05:00
Zhaoming Luo
d126092002 Kernel/x86_64: Fix the number in a comment in RTC 2024-12-11 20:11:11 +01:00
Sönke Holz
a3af84c5e6 Kernel/aarch64: Get RPi timer address and IRQ number from the devicetree 2024-12-10 16:25:46 +01:00
Sönke Holz
0eec585596 Kernel/aarch64: Get RPi interrupt controller address from the devicetree 2024-12-10 16:25:46 +01:00