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2a4a19aed8
During initialization of PCI MMIO access mechanism we ensure that we have an allocation from the kernel virtual address space that cannot be taken by other components in the OS. Also, now we ensure that interrupts are disabled so mapping the region doesn't fail. In order to reduce overhead, map_device() will map the requested PCI address only if it's not mapped already. The run script has been changed so now we can boot a Q35 machine, that supports PCI ECAM. To ensure we will be able to load the machine, a PIIX3 IDE controller was added to the Q35 machine configuration in the run script. An AHCI controller was added to the i440fx machine configuration.
148 lines
3.9 KiB
C++
148 lines
3.9 KiB
C++
#pragma once
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#include <AK/Function.h>
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#include <AK/Types.h>
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#define PCI_VENDOR_ID 0x00 // word
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#define PCI_DEVICE_ID 0x02 // word
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#define PCI_COMMAND 0x04 // word
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#define PCI_STATUS 0x06 // word
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#define PCI_REVISION_ID 0x08 // byte
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#define PCI_PROG_IF 0x09 // byte
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#define PCI_SUBCLASS 0x0a // byte
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#define PCI_CLASS 0x0b // byte
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#define PCI_CACHE_LINE_SIZE 0x0c // byte
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#define PCI_LATENCY_TIMER 0x0d // byte
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#define PCI_HEADER_TYPE 0x0e // byte
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#define PCI_BIST 0x0f // byte
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#define PCI_BAR0 0x10 // u32
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#define PCI_BAR1 0x14 // u32
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#define PCI_BAR2 0x18 // u32
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#define PCI_BAR3 0x1C // u32
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#define PCI_BAR4 0x20 // u32
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#define PCI_BAR5 0x24 // u32
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#define PCI_SUBSYSTEM_ID 0x2C // u16
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#define PCI_SUBSYSTEM_VENDOR_ID 0x2E // u16
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#define PCI_INTERRUPT_LINE 0x3C // byte
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#define PCI_SECONDARY_BUS 0x19 // byte
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#define PCI_HEADER_TYPE_DEVICE 0
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#define PCI_HEADER_TYPE_BRIDGE 1
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#define PCI_TYPE_BRIDGE 0x0604
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#define PCI_ADDRESS_PORT 0xCF8
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#define PCI_VALUE_PORT 0xCFC
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#define PCI_NONE 0xFFFF
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#define PCI_MAX_DEVICES_PER_BUS 32
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#define PCI_MAX_BUSES 256
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#define PCI_MAX_FUNCTIONS_PER_DEVICE 8
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//#define PCI_DEBUG 1
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namespace PCI {
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struct ID {
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u16 vendor_id { 0 };
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u16 device_id { 0 };
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bool is_null() const { return !vendor_id && !device_id; }
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bool operator==(const ID& other) const
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{
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return vendor_id == other.vendor_id && device_id == other.device_id;
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}
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};
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struct Address {
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public:
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Address() {}
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Address(u16 seg)
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: m_seg(seg)
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, m_bus(0)
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, m_slot(0)
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, m_function(0)
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{
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}
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Address(u16 seg, u8 bus, u8 slot, u8 function)
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: m_seg(seg)
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, m_bus(bus)
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, m_slot(slot)
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, m_function(function)
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{
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}
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bool is_null() const { return !m_bus && !m_slot && !m_function; }
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operator bool() const { return !is_null(); }
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u16 seg() const { return m_seg; }
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u8 bus() const { return m_bus; }
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u8 slot() const { return m_slot; }
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u8 function() const { return m_function; }
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u32 io_address_for_field(u8 field) const
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{
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return 0x80000000u | (m_bus << 16u) | (m_slot << 11u) | (m_function << 8u) | (field & 0xfc);
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}
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protected:
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u32 m_seg { 0 };
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u8 m_bus { 0 };
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u8 m_slot { 0 };
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u8 m_function { 0 };
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};
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struct ChangeableAddress : public Address {
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ChangeableAddress()
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: Address(0)
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{
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}
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explicit ChangeableAddress(u16 seg)
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: Address(seg)
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{
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}
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ChangeableAddress(u16 seg, u8 bus, u8 slot, u8 function)
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: Address(seg, bus, slot, function)
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{
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}
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void set_seg(u16 seg) { m_seg = seg; }
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void set_bus(u8 bus) { m_bus = bus; }
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void set_slot(u8 slot) { m_slot = slot; }
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void set_function(u8 function) { m_function = function; }
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bool operator==(const Address& address)
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{
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if (m_seg == address.seg() && m_bus == address.bus() && m_slot == address.slot() && m_function == address.function())
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return true;
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else
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return false;
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}
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const ChangeableAddress& operator=(const Address& address)
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{
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set_seg(address.seg());
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set_bus(address.bus());
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set_slot(address.slot());
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set_function(address.function());
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return *this;
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}
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};
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void enumerate_all(Function<void(Address, ID)> callback);
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u8 get_interrupt_line(Address);
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u32 get_BAR0(Address);
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u32 get_BAR1(Address);
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u32 get_BAR2(Address);
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u32 get_BAR3(Address);
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u32 get_BAR4(Address);
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u32 get_BAR5(Address);
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u8 get_revision_id(Address);
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u8 get_subclass(Address);
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u8 get_class(Address);
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u16 get_subsystem_id(Address);
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u16 get_subsystem_vendor_id(Address);
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u32 get_BAR_Space_Size(Address, u8);
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void enable_bus_mastering(Address);
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void disable_bus_mastering(Address);
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class Initializer;
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class Access;
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class MMIOAccess;
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class IOAccess;
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class MMIOSegment;
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}
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