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398d271a46
About half of the Processor code is common across architectures, so let's share it with a templated base class. Also, other code that can be shared in some ways, like FPUState and TrapFrame functions, is adjusted here. Functions which cannot be shared trivially (without internal refactoring) are left alone for now.
32 lines
1,000 B
C++
32 lines
1,000 B
C++
/*
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* Copyright (c) 2022, Gunnar Beutner <gbeutner@serenityos.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Platform.h>
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// FIXME: There's only a minor difference between x86 and Aarch64/RISC-V trap frames; the prev_irq member.
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// This seems to be unnecessary (see FIXME in Processor::enter_trap),
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// so investigate whether we need it and either:
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// (1) Remove the member and corresponding code from x86
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// (2) Implement prev_irq in the assembly stubs of Aarch64 and RISC-V
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// and then use the same TrapFrame on all architectures.
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#if ARCH(X86_64)
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# include <Kernel/Arch/x86_64/TrapFrame.h>
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#elif ARCH(AARCH64)
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# include <Kernel/Arch/aarch64/TrapFrame.h>
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#else
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# error "Unknown architecture"
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#endif
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namespace Kernel {
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extern "C" void enter_trap_no_irq(TrapFrame* trap) __attribute__((used));
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extern "C" void enter_trap(TrapFrame*) __attribute__((used));
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extern "C" void exit_trap(TrapFrame*) __attribute__((used));
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}
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