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10ffaf019f
A basic Floppy Disk Controller device driver for any system later than (and including) the IBM AT. The driver is based on the documentation supplied by QEMU, which is the datasheet for the Intel 82078 Floppy Disk controller (found here: https://wiki.qemu.org/images/f/f0/29047403.pdf) Naturally, floppy disks are a _very_ outdated storage medium, however, as Serenity is a throwback to aesthetic 90s computing, it's a definite must have. Not to mention that there are still a lot of floppy disks around, with countless petabytes of software on them, so it would be nice if people could create images of said disks with serenity. The code for this is mostly clean. however there are a LOT of values specified in the datasheet, so some of them might be wrong, not to mention that the actual specification itself is rather dirt and seemingly hacked together. I'm also only supporting 3.5" floppy disks, without PIO polling (DMA only), so if you want anything more/less than 1.44MB HD Floppys, you'll have to do it yourself.
520 lines
15 KiB
C++
520 lines
15 KiB
C++
#include <Kernel/Arch/i386/PIT.h>
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#include <Kernel/Devices/FloppyDiskDevice.h>
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#include <Kernel/FileSystem/ProcFS.h>
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#include <Kernel/IO.h>
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#include <Kernel/Process.h>
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#include <Kernel/VM/MemoryManager.h>
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// Uncomment me for a LOT of output
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//#define FLOPPY_DEBUG
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// THESE ARE OFFSETS!
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#define FLOPPY_STATUS_A 0x00 // ro
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#define FLOPPY_STATUS_B 0x01 // ro
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#define FLOPPY_DOR 0x02 // rw
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#define FLOPPY_TDR 0x03 // rw
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#define FLOPPY_MSR 0x04 // ro
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#define FLOPPY_DSR 0x04 // wo
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#define FLOPPY_FIFO 0x05
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#define FLOPPY_RSVD 0x06
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#define FLOPPY_DIR 0x07 // ro
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#define FLOPPY_CCR 0x07 // wo
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#define FLOPPY_STATUS_DIR 0x01
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#define FLOPPY_STATUS_WP 0x02
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#define FLOPPY_STATUS_INDX 0x04
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#define FLOPPY_STATUS_HDSEL 0x08
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#define FLOPPY_STATUS_TRK0 0x10
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#define FLOPPY_STATUS_STEP 0x20
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#define FLOPPY_STATUS_DRV2 0x40
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#define FLOPPY_STATUS_INTW 0x80 // A.K.A INT_PENDING
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#define FLOPPY_DOR_DRVSEL0 0x01
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#define FLOPPY_DOR_DRVSEL1 0x02
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#define FLOPPY_DOR_RESET 0x04
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#define FLOPPY_DOR_DMAGATE 0x08
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#define FLOPPY_DOR_MOTEN0 0x10
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#define FLOPPY_DOR_MOTEN1 0x20
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#define FLOPPY_DOR_MOTEN2 0x40
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#define FLOPPY_DOR_MOTEN3 0x80
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// Preset values to activate drive select and motor enable for each drive
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#define FLOPPY_DOR_DRV0 0x1C
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#define FLOPPY_DOR_DRV1 0x2D
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#define FLOPPY_DOR_DRV2 0x4E
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#define FLOPPY_DOR_DRV3 0x8F
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#define FLOPPY_MSR_FDD0BSY 0x01
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#define FLOPPY_MSR_FDD1BSY 0x02
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#define FLOPPY_MSR_FDD2BSY 0x04
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#define FLOPPY_MSR_FDD3BSY 0x08
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#define FLOPPY_MSR_FDCBSY 0x10
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#define FLOPPY_MSR_MODE 0x20 // 0 in DMA mode, 1 in PIO mode
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#define FLOPPY_MSR_DIO 0x40 // 0 FDC is expecting data from the CPU, 1 if FDC has data for CPU
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#define FLOPPY_MSR_RQM 0x80 // 0 Data register not ready, 1 data register ready
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#define FLOPPY_CCR_DRTESEL0 0x01
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#define FLOPPY_CCR_DRTESEL1 0x02
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#define FLOPPY_MT 0x80 // Multi-track selector. The controller treats 2 tracks (on side 0 and side 1) as a single track instead
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#define FLOPPY_MFM 0x40 // 1 Means this disk is double density (double sided??)
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#define FLOPPY_SK 0x20 // Skip flag. Skips sectors containing deleted data automatically for us :)
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#define SR0_OKAY (0x00) << 6
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#define SR0_ABORMAL_TERMINATION (0x01) << 6
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#define SR0_INVALID_CMD (0x02) << 6
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#define SR0_ABNORMAL_TERM_POLL (0x03) << 6
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#define FLOPPY_DMA_CHANNEL 2 // All FDCs are DMA channel 2
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#define IRQ_FLOPPY_DRIVE 6
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NonnullRefPtr<FloppyDiskDevice> FloppyDiskDevice::create(DriveType type)
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{
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return adopt(*new FloppyDiskDevice(type));
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}
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const char* FloppyDiskDevice::class_name() const
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{
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if (m_controller_version == 0x90)
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return "Intel 82078 Floppy Disk Controller";
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else if (m_controller_version == 0x80)
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return "NEC uPD765";
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return "Generic Floppy Disk Controller";
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}
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FloppyDiskDevice::FloppyDiskDevice(FloppyDiskDevice::DriveType type)
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: IRQHandler(IRQ_FLOPPY_DRIVE)
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, m_io_base_addr((type == FloppyDiskDevice::DriveType::Master) ? 0x3F0 : 0x370)
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{
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initialize();
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}
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FloppyDiskDevice::~FloppyDiskDevice()
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{
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}
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unsigned FloppyDiskDevice::block_size() const
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{
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return BYTES_PER_SECTOR;
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}
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bool FloppyDiskDevice::read_block(unsigned index, u8* data) const
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{
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return const_cast<FloppyDiskDevice*>(this)->read_blocks(index, 1, data);
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}
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bool FloppyDiskDevice::write_block(unsigned index, const u8* data)
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{
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return write_sectors_with_dma(index, 1, data);
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}
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bool FloppyDiskDevice::read_blocks(unsigned index, u16 count, u8* data)
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{
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return read_sectors_with_dma(index, count, data);
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}
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bool FloppyDiskDevice::write_blocks(unsigned index, u16 count, const u8* data)
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{
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return write_sectors_with_dma(index, count, data);
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;
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}
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bool FloppyDiskDevice::read_sectors_with_dma(u16 lba, u16 count, u8* outbuf)
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{
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LOCKER(m_lock); // Acquire lock
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: read_sectors_with_dma lba = %d count = %d\n", lba, count);
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#endif
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motor_enable(is_slave() ? 1 : 0); // Should I bother casting this?!
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write_ccr(0);
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recalibrate(); // Recalibrate the drive
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// We have to wait for about 300ms for the drive to spin up, because of
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// the inertia of the motor and diskette. This is only
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// important on real hardware
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// TODO: Fix this if you want to get it running on real hardware. This code doesn't allow
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// time for the disk to spin up.
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//u32 start = PIT::seconds_since_boot();
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//while(start < PIT::seconds_since_boot() + 1)
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// ;
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disable_irq();
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IO::out8(0xA, FLOPPY_DMA_CHANNEL | 0x4); // Channel 2 SEL, MASK_ON = 1
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IO::out8(0x0B, 0x56); // Begin DMA, Single Transfer, Increment, Auto, FDC -> RAM, Channel 2
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IO::out8(0xA, 0x2); // Unmask channel 2. The transfer will now begin
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// Translate the LBA address into something the FDC understands.
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u16 cylinder = lba2cylinder(lba);
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u16 head = lba2head(lba);
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u16 sector = lba2sector(lba);
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: addr = 0x%x c = %d h = %d s = %d\n", lba * BYTES_PER_SECTOR, cylinder, head, sector);
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#endif
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// Intel recommends 3 attempts for a read/write
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for (int i = 0; i < 3; i++) {
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// Now actually send the command to the drive. This is a big one!
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send_byte(FLOPPY_MFM | FLOPPY_MT | FLOPPY_SK | static_cast<u8>(FloppyCommand::ReadData));
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send_byte(head << 2 | is_slave() ? 1 : 0);
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send_byte(cylinder);
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send_byte(head);
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send_byte(sector);
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send_byte(SECTORS_PER_CYLINDER >> 8); // Yikes!
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send_byte((sector + 1) >= SECTORS_PER_CYLINDER ? SECTORS_PER_CYLINDER : sector + 1);
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send_byte(0x27); // GPL3 value. The Datasheet doesn't really specify the values for this properly...
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send_byte(0xff);
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enable_irq();
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wait_for_irq(); // TODO: See if there was a lockup here via some "timeout counter"
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m_interrupted = false;
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// Flush FIFO
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read_byte();
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read_byte();
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read_byte();
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u8 cyl = read_byte();
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read_byte();
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read_byte();
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read_byte();
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if (cyl != cylinder) {
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: cyl != cylinder (cyl = %d cylinder = %d)! Retrying...\n", cyl, cylinder);
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#endif
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continue;
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}
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// Let the controller know we handled the interrupt
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send_byte(FloppyCommand::SenseInterrupt);
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u8 st0 = read_byte();
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u8 pcn = read_byte();
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static_cast<void>(st0);
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static_cast<void>(pcn);
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memcpy(outbuf, m_dma_buffer_page->paddr().as_ptr(), 512 * count);
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//kprintf("fdc: 0x%x\n", *outbuf);
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return true;
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}
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: out of read attempts (check your hardware maybe!?)\n");
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#endif
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return false;
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}
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bool FloppyDiskDevice::write_sectors_with_dma(u16 lba, u16 count, const u8* inbuf)
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{
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LOCKER(m_lock); // Acquire lock
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: write_sectors_with_dma lba = %d count = %d\n", lba, count);
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#endif
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motor_enable(is_slave() ? 1 : 0); // Should I bother casting this?!
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write_ccr(0);
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recalibrate(); // Recalibrate the drive
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// We have to wait for about 300ms for the drive to spin up, because of
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// the inertia of the motor and diskette.
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// TODO: Fix this abomination please!
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//u32 start = PIT::seconds_since_boot();
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//while(start < PIT::seconds_since_boot() + 1)
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// ;
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disable_irq();
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IO::out8(0xA, FLOPPY_DMA_CHANNEL | 0x4); // Channel 2 SEL, MASK_ON = 1
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IO::out8(0x0B, 0x5A); // Begin DMA, Single Transfer, Increment, Auto, RAM -> FDC, Channel 2
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IO::out8(0xA, 0x2); // Unmask channel 2. The transfer will now begin
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u16 cylinder = lba2cylinder(lba);
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u16 head = lba2head(lba);
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u16 sector = lba2sector(lba);
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: addr = 0x%x c = %d h = %d s = %d\n", lba * BYTES_PER_SECTOR, cylinder, head, sector);
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#endif
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for (int i = 0; i < 3; i++) {
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// Now actually send the command to the drive. This is a big one!
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send_byte(FLOPPY_MFM | FLOPPY_MT | static_cast<u8>(FloppyCommand::WriteData));
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send_byte(head << 2 | is_slave() ? 1 : 0);
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send_byte(cylinder);
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send_byte(head);
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send_byte(sector);
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send_byte(SECTORS_PER_CYLINDER >> 8); // Yikes!
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send_byte((sector + 1) >= SECTORS_PER_CYLINDER ? SECTORS_PER_CYLINDER : sector + 1);
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send_byte(0x27); // GPL3 value. The Datasheet doesn't really specify the values for this properly...
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send_byte(0xff);
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enable_irq();
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wait_for_irq(); // TODO: See if there was a lockup here via some "timeout counter"
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m_interrupted = false;
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// Flush FIFO
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read_byte();
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read_byte();
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read_byte();
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u8 cyl = read_byte();
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read_byte();
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read_byte();
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read_byte();
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if (cyl != cylinder) {
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: cyl != cylinder (cyl = %d cylinder = %d)! Retrying...\n", cyl, cylinder);
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#endif
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continue;
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}
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// Let the controller know we handled the interrupt
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send_byte(FloppyCommand::SenseInterrupt);
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u8 st0 = read_byte();
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u8 pcn = read_byte();
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static_cast<void>(st0);
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static_cast<void>(pcn);
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memcpy(m_dma_buffer_page->paddr().as_ptr(), inbuf, 512 * count);
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return true;
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}
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: out of read attempts (check your hardware maybe!?)\n");
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#endif
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return false;
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}
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bool FloppyDiskDevice::wait_for_irq()
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{
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: Waiting for interrupt...\n");
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#endif
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while (!m_interrupted) {
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Scheduler::yield();
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}
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memory_barrier();
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return true;
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}
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void FloppyDiskDevice::handle_irq()
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{
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// The only thing we need to do is acknowledge the IRQ happened
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m_interrupted = true;
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: Received IRQ!\n");
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#endif
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}
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void FloppyDiskDevice::send_byte(u8 value) const
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{
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for (int i = 0; i < 1024; i++) {
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if (read_msr() & FLOPPY_MSR_RQM) {
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IO::out8(m_io_base_addr + FLOPPY_FIFO, value);
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return;
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}
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}
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: FIFO write timed out!\n");
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#endif
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}
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void FloppyDiskDevice::send_byte(FloppyCommand value) const
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{
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for (int i = 0; i < 1024; i++) {
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if (read_msr() & FLOPPY_MSR_RQM) {
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IO::out8(m_io_base_addr + FLOPPY_FIFO, static_cast<u8>(value));
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return;
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}
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}
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: FIFO write timed out!\n");
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#endif
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}
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u8 FloppyDiskDevice::read_byte() const
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{
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for (int i = 0; i < 1024; i++) {
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if (read_msr() & (FLOPPY_MSR_RQM | FLOPPY_MSR_DIO)) {
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return IO::in8(m_io_base_addr + FLOPPY_FIFO);
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}
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}
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: FIFO read timed out!\n");
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#endif
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return 0xff;
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}
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void FloppyDiskDevice::write_dor(u8 value) const
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{
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IO::out8(m_io_base_addr + FLOPPY_DOR, value);
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}
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void FloppyDiskDevice::write_ccr(u8 value) const
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{
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IO::out8(m_io_base_addr + FLOPPY_CCR, value);
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}
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u8 FloppyDiskDevice::read_msr() const
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{
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return IO::in8(m_io_base_addr + FLOPPY_MSR);
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}
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void FloppyDiskDevice::motor_enable(bool slave) const
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{
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u8 val = slave ? 0x1C : 0x2D;
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write_dor(val);
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}
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bool FloppyDiskDevice::is_busy() const
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{
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return read_msr() & FLOPPY_MSR;
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}
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bool FloppyDiskDevice::recalibrate()
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{
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: recalibrating drive...\n");
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#endif
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u8 slave = is_slave() ? 1 : 0;
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motor_enable(slave);
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for (int i = 0; i < 16; i++) {
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send_byte(FloppyCommand::Recalibrate);
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send_byte(slave);
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wait_for_irq();
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m_interrupted = false;
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send_byte(FloppyCommand::Recalibrate);
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u8 st0 = read_byte();
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u8 pcn = read_byte();
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static_cast<void>(st0);
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if (pcn == 0)
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return true;
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}
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: failed to calibrate drive (check your hardware!)\n");
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#endif
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return false;
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}
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bool FloppyDiskDevice::seek(u16 lba)
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{
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u8 head = lba2head(lba) & 0x01;
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u8 cylinder = lba2cylinder(lba) & 0xff;
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u8 slave = is_slave() ? 1 : 0;
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// First, we need to enable the correct drive motor
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motor_enable(slave);
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: seeking to cylinder %d on side %d on drive %d\n", cylinder, head, slave);
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#endif
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// Try at most 5 times to seek to the desired cylinder
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for (int attempt = 0; attempt < 5; attempt++) {
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send_byte(FloppyCommand::Seek);
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send_byte((head << 2) | slave);
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send_byte(cylinder);
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wait_for_irq();
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m_interrupted = false;
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send_byte(FloppyCommand::SenseInterrupt);
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u8 st0 = read_byte();
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u8 pcn = read_byte();
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if ((st0 >> 5) != 1 || pcn != cylinder || (st0 & 0x01)) {
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: failed to seek to cylinder %d on attempt %d!\n", cylinder, attempt);
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#endif
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continue;
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}
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return true;
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}
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kprintf("fdc: failed to seek after 3 attempts! Aborting...\n");
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return false;
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}
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// This is following Intel's datasheet for the 82077, page 41
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void FloppyDiskDevice::initialize()
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{
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#ifdef FLOPPY_DEBUG
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kprintf("fdc: m_io_base = 0x%x IRQn = %d\n", m_io_base_addr, IRQ_FLOPPY_DRIVE);
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#endif
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enable_irq();
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// Get the version of the Floppy Disk Controller
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send_byte(FloppyCommand::Version);
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m_controller_version = read_byte();
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kprintf("fdc: Version = 0x%x\n", m_controller_version);
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// Reset
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write_dor(0);
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write_dor(FLOPPY_DOR_RESET | FLOPPY_DOR_DMAGATE);
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write_ccr(0);
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wait_for_irq();
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|
m_interrupted = false;
|
|
|
|
// "If (and only if) drive polling mode is turned on, send 4 Sense Interrupt commands (required). "
|
|
// Sorry OSDev, but the Intel Manual states otherwise. This ALWAYS needs to be performed.
|
|
for (int i = 0; i < 4; i++) {
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|
send_byte(FloppyCommand::SenseInterrupt);
|
|
u8 sr0 = read_byte();
|
|
u8 trk = read_byte();
|
|
|
|
kprintf("sr0 = 0x%x, cyl = 0x%x\n", sr0, trk);
|
|
}
|
|
|
|
// This is hardcoded for a 3.5" floppy disk drive
|
|
send_byte(FloppyCommand::Specify);
|
|
send_byte(0x08); // (SRT << 4) | HUT
|
|
send_byte(0x0A); // (HLT << 1) | NDMA
|
|
|
|
// Allocate a buffer page for us to read into. This only needs to be one sector in size.
|
|
m_dma_buffer_page = MM.allocate_supervisor_physical_page();
|
|
#ifdef FLOPPY_DEBUG
|
|
kprintf("fdc: allocated supervisor page at paddr 0x%x\n", m_dma_buffer_page->paddr());
|
|
#endif
|
|
|
|
// Now, let's initialise channel 2 of the DMA controller!
|
|
// This only needs to be done here, then we can just change the direction of
|
|
// the transfer
|
|
IO::out8(0xA, FLOPPY_DMA_CHANNEL | 0x4); // Channel 2 SEL, MASK_ON = 1
|
|
|
|
IO::out8(0xC, 0xFF); // Reset Master Flip Flop
|
|
|
|
// Set the buffer page address (the lower 16-bits)
|
|
IO::out8(0x4, m_dma_buffer_page->paddr().get() & 0xff);
|
|
IO::out8(0x4, (m_dma_buffer_page->paddr().get() >> 8) & 0xff);
|
|
|
|
IO::out8(0xC, 0xFF); // Reset Master Flip Flop again
|
|
|
|
IO::out8(0x05, (SECTORS_PER_CYLINDER * BYTES_PER_SECTOR) & 0xff);
|
|
IO::out8(0x05, (SECTORS_PER_CYLINDER * BYTES_PER_SECTOR) >> 8);
|
|
IO::out8(0x81, (m_dma_buffer_page->paddr().get() >> 16) & 0xff); // Supervisor page could be a 24-bit address, so set the External Page R/W register
|
|
|
|
IO::out8(0xA, 0x2); // Unmask Channel 2
|
|
|
|
#ifdef FLOPPY_DEBUG
|
|
kprintf("fdc: fd%d initialised succesfully!\n", is_slave() ? 1 : 0);
|
|
#endif
|
|
}
|