Liav A 9d10eb473d Kernel: Add the DeviceController class in the PCI subsystem ... Such device is not an IRQHandler by itself, but actually a controller of many IRQ or MSI devices. The purpose of this class is to manage multiple sources of interrupts. For example, a generic ISA IDE controller controls 2 IRQ sources - 14 and 15. So, when we initialize the IDE controller, it will initialize two IDE channels (also known as PATAChannels) to utilize IRQ 14 and 15, respectively. NVMe with MSI-X support can theoretically handle up to 2048 interrupts.		2020-12-21 00:19:21 +01:00
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Access.cpp	Kernel: Map PCI devices only once during boot	2020-11-01 10:19:17 +01:00
Access.h	Kernel: Map PCI devices only once during boot	2020-11-01 10:19:17 +01:00
Definitions.h	Kernel: Add the DeviceController class in the PCI subsystem	2020-12-21 00:19:21 +01:00
Device.cpp	Kernel: Use nested Kernel::PCI namespaces more to reduce PCI:: spam	2020-04-08 17:29:37 +02:00
Device.h	Kernel: Change get_pci_address() to pci_address() in PCI::Device class	2020-02-24 11:27:03 +01:00
DeviceController.cpp	Kernel: Add the DeviceController class in the PCI subsystem	2020-12-21 00:19:21 +01:00
DeviceController.h	Kernel: Add the DeviceController class in the PCI subsystem	2020-12-21 00:19:21 +01:00
Initializer.cpp	Meta+Kernel: Make clang-format-10 clean	2020-09-25 21:18:17 +02:00
Initializer.h	Kernel: Simplify PCI initialization logic	2020-04-08 17:39:17 +02:00
IOAccess.cpp	Kernel: Reduce code duplication in the PCI IO access read helpers	2020-11-01 10:19:17 +01:00
IOAccess.h	Meta: Add a script check the presence of "#pragma once" in header files	2020-05-29 07:59:45 +02:00
MMIOAccess.cpp	Kernel: Map PCI devices only once during boot	2020-11-01 10:19:17 +01:00
MMIOAccess.h	Kernel: Map PCI devices only once during boot	2020-11-01 10:19:17 +01:00